HSIO Validation Lead

NVIDIA•Santa Clara, CA

57d•Hybrid

About The Position

NVIDIA’s invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with GPUs serving as the brains of computers, robots, and self-driving cars. Today, we are increasingly known as “the AI computing company.” We are actively seeking the smartest minds to join our company and usher in the next wave of computing. NVIDIA’s Silicon Co-Design Group is responsible for crafting NVIDIA’s GPUs and SoCs into groundbreaking platforms for autonomous machines, Cloud and Data Centers, Deep learning, High-Performance Computing, Gaming, and Entertainment solutions.

Requirements

BS or MS in Electrical or Computer Engineering (or equivalent experience) and a minimum of 8 years of relevant experience
In-depth understanding of PCIe (or similar) protocol and characterization/validation methods in a post-silicon environment
Excellent knowledge of Signal integrity concepts, Silicon characteristics, and high-speed/SERDES functional validation
Good knowledge of lab equipment (DSOs, BERT, Protocol/Logic analyzers) and hands-on post-Si bring-up, functional validation of HSIO interfaces
Understanding of firmware/driver structures and their interaction with HW.
Strong in scripting languages (Perl, Python) to write direct test/debug programs for stress and failure analysis
Strong project management, collaboration, and communication skills

Responsibilities

Drive the planning and execution of PCIe/NVLINK/C2C or similar HSIO interfaces across functional bring-up, system-level validation, productization, and troubleshooting for NVIDIA GPUs, CPUs, and SOCs.
Drive schedule, programming guides, customer critical issues, manufacturing yield improvements, and design feedback.
Investigate technically complicated HSIO bugs and help drive debug efforts across various teams.
Coordinate with logic design, circuit design, board design, Simulation, diagnostics, ATE, firmware, driver, and marketing teams to drive the chip into production.
Develop new methodologies to improve the silicon validation process, helping meet upcoming industry standards for performance, adaptability, and safety.
Ensure interoperability with connected devices and system components in sophisticated interconnect topologies.
Engage proactively with multi-functional engineering teams, including system architects, mixed-signal design, DGX, software/firmware, hardware/software quality assurance, operations, and application engineering, to facilitate the design, development, troubleshooting, and release of upcoming products.