HSIO Bench Test Engineer

Qualcomm • San Diego, CA

1d

About The Position

This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip) designed by Qualcomm. Main responsibilities include defining and executing the development of Test methodologies and characterization of High Speed SERDES Interfaces such as PCIe, USB3, UFS, DP, MIPI (DSI, CSI), PLLs and leading edge LP-DDR & PC-DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY IP, IOs, Clocking architecture, Delay circuits, Power Distribution Network) as well as other proprietary interfaces. The engineer will also be responsible for developing and executing characterization plans for High Speed Interfaces to optimize design parameters and validate electrical compliance, driving corresponding first silicon bring up & debug to qualify designs fabricated at external foundries and performing technical data analysis of parametric performance over various operating conditions and configurations. The engineer will also assist in HW design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design. The engineer will be working closely with cross-functional teams such as IC Design, Systems Engineering for chip/circuit bring up and debug. The engineer will be working with Customer Engineering and Hardware Applications teams to resolve customer issues/RMA debug in a time critical environment. The individual selected for the position should be passionate about delivering quality work products, seek to continually learn about Qualcomm products as well as essential knowledge of industry trends, competitor products, and advances in various engineering fields from publicly available information and assist in conducting specialized analyses (e.g., feasibility studies, signal integrity, teardown analyses).

Requirements

• Bachelor's degree in Engineering, Computer Science, or related field
• 3+ years preferred (fresh graduates welcome to apply)
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Nice To Haves

• Master's Degree in Electrical/Computer Engineering or related field
• 1+ year of experience in related areas.
• Good understanding of VLSI technologies, CMOS analog and digital integrated circuits, mixed-signal and semiconductor physics.
• Knowledge of High Speed test and characterization including eye diagram characteristics, differential signals, jitter analysis, signal integrity etc is preferred.
• Familiarity with SERDES Characterization/Validation and Transmitter, Receiver design blocks is a plus.
• Familiarity with DDR 2/3/4/5, LPDDR 2/3/4/5 protocol, timing diagrams and device specifications is a plus.
• Hands on experience with lab equipment such as Oscilloscopes, TDRs/VNAs, J-BERT etc is preferred.
• Experience with Python/C# for test automation is a plus.
• Familiarity with Board Design concepts (Schematic reviews, Layout best practices etc) is a plus.
• Good ASIC device level characterization skills.
• System level knowledge is a plus.
• Strong verbal and written communications skills as well as good organization and documentation skills.
• Strong problem solving & debugging skills.
• Ability to work independently and with good initiative to overcome technical challenges.
• Strong Interpersonal and teamwork skills with proven ability to work effectively in a fast-paced multi-disciplinary environment.

Responsibilities

• Defining and executing the development of Test methodologies and characterization of High Speed SERDES Interfaces such as PCIe, USB3, UFS, DP, MIPI (DSI, CSI), PLLs and leading edge LP-DDR & PC-DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY IP, IOs, Clocking architecture, Delay circuits, Power Distribution Network) as well as other proprietary interfaces.
• Developing and executing characterization plans for High Speed Interfaces to optimize design parameters and validate electrical compliance.
• Driving corresponding first silicon bring up & debug to qualify designs fabricated at external foundries.
• Performing technical data analysis of parametric performance over various operating conditions and configurations.
• Assisting in HW design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design.
• Working closely with cross-functional teams such as IC Design, Systems Engineering for chip/circuit bring up and debug.
• Working with Customer Engineering and Hardware Applications teams to resolve customer issues/RMA debug in a time critical environment.
• Delivering quality work products.
• Continually learning about Qualcomm products, industry trends, competitor products, and advances in various engineering fields.
• Conducting specialized analyses (e.g., feasibility studies, signal integrity, teardown analyses).

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level
• Number of Employees: 5,001-10,000 employees