High Speed IO (HSIO) Validation Engineer

Advanced Micro Devices, Inc•Santa Clara, CA

5d•Onsite

About The Position

The High-Speed IO (HSIO) Validation Engineer is responsible for validating and debugging high-speed interfaces across CPU and GPU platforms spanning data center servers and AI systems. In this role, you will work closely with PHY design, SI/PI, firmware, and platform teams to execute validation plans, characterize interface performance, and drive root-cause analysis of silicon- and system-level issues. You will play a key role in ensuring product quality and readiness for industry-leading technologies.

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field with 5+ years of experience in high-speed IO, silicon validation, system validation, or related areas.
Experience with high-speed serial interfaces such as PCIe, CXL, Ethernet, UALink, or similar technologies.
Strong understanding of signal integrity concepts, channel characteristics, equalization techniques (CTLE, DFE, TX FIR), and link-level behavior.
Experience with lab bring-up, validation, and debug using high-speed measurement equipment such as oscilloscopes, BERTs, VNAs, and protocol analyzers.
Strong programming and scripting skills in Python, C/C++, or similar languages for automation and data analysis.
Familiarity with silicon bring-up, compliance testing, and system-level debug methodologies.
Strong analytical and problem-solving skills with the ability to drive technical issues to resolution.
Effective communication and collaboration skills within cross-functional engineering teams.

Nice To Haves

Experience validating server, AI, networking, or accelerator platforms.
Experience with PCIe, Ethernet, UALink, or other high-speed interface compliance and interoperability testing.
Experience developing automated validation frameworks and data analysis workflows.
Contributions to technical publications, patents, industry standards, or internal best-known methods (BKMs).
Strong commitment to quality, innovation, teamwork, and continuous improvement.

Responsibilities

Execute validation plans for high-speed IO interfaces such as PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other emerging technologies.
Support post-silicon bring-up, characterization, compliance testing, margining, and interoperability validation across multiple platforms.
Collaborate with design, architecture, firmware, board, and test teams to investigate and resolve high-speed interface issues.
Develop and enhance test automation, validation scripts, and data analysis tools to improve validation efficiency and coverage.
Perform electrical- and protocol-level debug using oscilloscopes, BERTs, protocol analyzers, and other lab equipment.
Analyze signal integrity, power integrity, and link training behavior to identify root causes and drive corrective actions.
Document validation findings, debug results, and recommendations, and communicate status to project stakeholders.
Contribute to the continuous improvement of validation methodologies, best-known methods (BKMs), and lab infrastructure.