High Speed Analog I/O designer

Broadcom•San Jose, CA

12d•$143,800 - $230,000

About The Position

As a Hardware Engineer, you will play a key role in designing and optimizing cutting-edge interface buffer chips for DDR/LP5/5X/6, chiplets and beyond in the latest FinFET process nodes. Your expertise in DDR I/Os, chip-chip interface I/Os and receiver (RX) design will be pivotal in developing high-performance solutions.

Requirements

Master's or Ph.D. in Electrical Engineering, Electronics Engineering, or a related field.
At least 10 years of experience in analog design, with a focus on high-speed RX and Analog-Front-End design.
Experience with FinFET technologies.
Expertise in high-speed DDR I/O interface, chip-chip interface design and optimization.
Strong knowledge of analog receiver circuits such as CTLE, DFE, FEE.
Sound knowledge of transmitter circuits such as FIR filter, slew rate control, voltage and current mode drivers.
Knowledge of design for reliability ( EM, IR, aging, self-heating ) and layout effects (matching, reliability, proximity effects etc.)
Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer).
Proficiency with analog design tools (e.g., Cadence Virtuoso, Maestro, Spectre, HSPICE) and simulation techniques.
Understanding of signal integrity, timing analysis and power management.
Strong analytical and problem-solving skills, with the ability to resolve complex design challenges
Excellent verbal and written communication skills, with the ability to clearly convey technical information to stakeholders.
Ability to work effectively within a cross-functional team and manage multiple priorities
Familiarity with industry standards and protocols related to DDR I/O, chiplet I/O and RX design

Responsibilities

Working with the chip team to understand specifications and identify potential circuit architectures and successful design strategies.
Design, simulation and optimization of high-speed DDR circuits and chiplet I/Os.
Design and enhance transmitter and receiver circuits including CTLE, VGA, DFE and slicers focusing on performance metrics such as sensitivity, linearity and power consumption.
Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area and performance targets
Oversee physical layout to minimize the effect of parasitics and process variation.
Conduct thorough simulations to validate design performance and reliability. Troubleshoot and implement corrective actions as needed.
Create clear and detailed design reports.
Analyze customer silicon data for design enhancement.
Stay current with industry trends and emerging technologies. Suggest and implement innovative solutions to enhance product performance and capabilities.