New College Grad - HBM SoC Design Engineer/Architect

Micron • Folsom, CA

3d • Onsite

About The Position

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. The Heterogeneous Integration Group (HIG) develops next-generation High Bandwidth Memory (HBM) solutions that enable advanced AI, high-performance computing, data center, and networking applications. Our team collaborates across architecture, RTL design, verification, physical design, firmware, and product engineering to deliver innovative memory-centric SoC solutions that meet demanding power, performance, area, quality, and schedule objectives. As an HBM SoC Design Engineer/Architect, you will contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs. Working alongside experienced engineers, you will apply knowledge gained through academic coursework, research, internships, and engineering projects to solve real-world semiconductor design challenges. This role offers opportunities to develop expertise in digital design, ASIC development, HBM architecture, and AI-enabled engineering methodologies that improve design productivity and quality.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field completed prior to the employment start date.
• Academic, research, internship, or project experience in digital design, ASIC development, FPGA design, computer architecture, or a related discipline.
• Working knowledge of Verilog, SystemVerilog, VHDL, or another hardware description language.
• Understanding of digital design fundamentals including finite-state machines (FSMs), pipelining, clocking, reset strategies, timing concepts, and synchronous logic.
• Strong analytical, problem-solving, written communication, and verbal communication skills with the ability to work effectively in collaborative engineering environments.

Nice To Haves

• Master's or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related technical discipline completed prior to the employment start date.
• Coursework, research, internship, or project experience in SoC design, RTL development, design verification, physical design, embedded systems, or semiconductor technologies.
• Familiarity with synthesis, static timing analysis (STA), simulation, formal verification, UVM, FPGA prototyping, or industry-standard EDA tools.
• Understanding of memory systems and high-speed interfaces such as HBM, DDR, LPDDR, PCIe, or CXL.
• Experience with automation, AI Enabled development tools, Generative AI, Large Language Models (LLMs), AI Assistants, or Agentic AI solutions applied to semiconductor design, validation, or engineering workflows.

Responsibilities

• Design, implement, and integrate digital logic and subsystem RTL using Verilog or SystemVerilog for next-generation HBM SoC solutions.
• Collaborate with architects and cross-functional engineering teams to translate functional requirements into microarchitectures, interface definitions, and implementation plans.
• Support design-quality activities including simulation, synthesis, static timing analysis, clock-domain crossing (CDC) analysis, debugging, and design reviews.
• Evaluate power, performance, area, and timing tradeoffs to develop data-driven technical recommendations and improve design quality.
• Develop automation solutions and leverage AI Assisted workflows, Generative AI, Large Language Models (LLMs), or Agentic AI technologies to improve engineering productivity, verification efficiency, and design analysis.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level