Hardware Verification Engineer — Electro-Optic Links

Lightmatter•Boston, MA

7d•Hybrid

About The Position

Lightmatter is seeking a hands-on Hardware Verification engineer to lead verification and characterization of high-speed electro-optic links across multiple silicon and system programs. This role involves working at the bench with the Electro-Optic Engineering (EOE) team, owning modeling methodology and measurement standards, and serving as the escalation point for complex signal integrity and link-performance issues within the organization. The company is at the forefront of AI data center infrastructure, utilizing its proprietary 3D-stacked photonics engine, Passage™, to connect processors at the speed of light for advanced AI and HPC workloads.

Requirements

MS/PhD in EE, Photonics, Physics (8+ yrs) or BS/MS (10+ yrs)
Ownership of verification strategy for a full silicon/system program
Deep expertise in 56G/112G/224G+ serial links, SerDes equalization (CTLE/FFE/DFE), and signal integrity (S-parameters, crosstalk, link budgets)
Hands-on lab experience leading investigations that stalled others
Strong Python/MATLAB for team-used automation frameworks
Proficiency with VNA, scopes, BERTs, TDRs, and tools like ADS, HFSS, Cadence, COMSOL
Track record mentoring engineers
Capacity to comply with U.S. export control laws.

Nice To Haves

Silicon photonics/EO systems at the architecture level
Package/PCB/channel co-design ownership
COM/IBIS-AMI modeling
Patents/standards contributions (OIF, IEEE 802.3)

Responsibilities

Run hands-on lab characterization and debug of high-speed electrical/optical hardware, including novel failure modes.
Build system-level electrical/optical/EO channel models and correlate them against bench measurements.
Own link budget and verification methodology while staying hands-on with validating measurements.
Characterize eye diagrams, BER, jitter, equalization, and channel impairments.
Support silicon bring-up and root-cause debug with analog, package, PCB, and SerDes teams.
Influence chip/package/system architecture tradeoffs based on bench findings.
Mentor Senior/Staff engineers without stepping back from lab work.
Build automation/tools to speed up characterization work.