Hardware Engineering Technical Leader - Acacia (hybrid)
About The Position
The application window is expected to close on: 06/05/2026. This position is required to be onsite in Maynard, MA and in office three days a week. Acacia, now a part of Cisco, is a global leader in the design and manufacture of high-speed coherent optical interconnect products. We are the architects behind the technology that transforms how data centers, cloud providers, and service providers connect. By pioneering breakthroughs in Silicon Photonics and Digital Signal Processing (DSP), Acacia is shrinking complex, power-hungry optical systems into high-performance, pluggable modules that scale the internet for the future. As part of the Acacia team, you will contribute to innovation on the cutting edge of 400G, 800G, and 1.2T technologies. We are a group of innovators dedicated to solving the world’s most difficult bandwidth and power-efficiency challenges. If you are passionate about pushing the boundaries of physics and engineering to build a faster, more connected world, Acacia is where you belong. You will be a key member of Acacia’s Hardware team and lead the hardware life cycle of our products. You will work within a multi-disciplinary Hardware, Software, Optics, and DSP engineering organization. The ideal candidate has strong relevant and recent technical and hands-on experience, is able to hit the ground running as an individual contributor, and has experience either directly or indirectly leading teams, mentoring peers, and leading large programs.
Requirements
- Bachelor’s degree to include a minimum of 12+ years of relevant industry experience
- Experience with transmission line theory and effects (micro strip, strip line, CPW, etc.)
- Experience with high-efficiency DC-DC power converters
- Experience with analog/RF simulation tools (e.g. LTSpice®, ADS®)
- Experience with VxDesigner®, Allegro® PCB and/or SiP Layout tools
- Experience with PCB layout and constraint management tools to guide layout for high speed signaling (above 50+ GHz)
- Experience with debugging and lab skills including working with innovative test equipment
Nice To Haves
- Masters or advanced degree
- Experience with Power Integrity (PI) simulations and tools
- Knowledge of optical components (lasers, modulators, detectors, DWDM technologies, etc.)
- Understanding and implementing digital control loops and DSP functions
- Knowledge of Python
Responsibilities
- Champion the innovation, architecture, specification, design, and validation of new hardware
- Apply strong depth and breadth of expertise in telecommunications and high-speed electro-optical transmission systems to resolve complex business problems
- Serve as a technical expert on verification, and issue resolution approach and coordinate with appropriate stakeholders to integrate changes into hardware design lifecycle
- Lead, mentor, and influence other engineers within the HW and other organization
Benefits
- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- grants of Cisco restricted stock units
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation time per full calendar year (non-exempt)
- flexible vacation time off program (exempt)
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- up to 80 hours of unused sick time carried forward
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
- annual bonuses (non-sales roles)
- performance-based incentive pay (sales roles)
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What This Job Offers
Job Type
Full-time
Career Level
Senior
