Hardware Design Engineer

Leidos•Arlington, VA

1d•Hybrid

About The Position

The Electronic Warfare Division of Leidos is seeking a Hardware Design Engineer to support Circuit Board and FPGA Firmware Design Engineering work with a multi-disciplined design team (electrical engineers, systems engineers, scientists, etc) to design, develop, simulate, and integrate challenging digital designs and RF sensor systems based on given project requirements. Candidate will have a strong background in high-speed digital design in support of a fast paced, multi-disciplinary design team. This role will also support integration, test, and verification in the final products. This position is expected to be part-time or full-time and could support telecommuting options depending on the candidate.

Requirements

Ability to be granted a security clearance
Experience with at least one FPGA integrated design and simulation environment tool and such as Xilinx Vivado/Vitis and Siemens ModelSim
Experience with at least one schematic entry and PCB Layout tool set such as Altium, KiCad, or Cadence Allegro/OrCad.
Experience with hardware integration, test and debug tools (high-speed logic analyzers, scopes, spectrum analyzers, etc.)
Proficiency in general computer skills such as Microsoft office Excel, PowerPoint and Word
BS in Electrical Engineering or Computer Engineering or related degree
Minimum of 4 years of relevant experience
Excellent oral and written communication skills

Nice To Haves

MS in Electrical Engineering or Computer Engineering or related
Experience writing test software in C/C++ or other language to validate design
Knowledge in the areas of performance characteristics of analog data converters, ADCs/DACs
ARM or RISC-V embedded processor based SoC design experience
Familiarity with electrical and mechanical standards such as FMC and VPX
Experience in signal processing theory and communications systems and the ability to apply theoretical knowledge in resolving real world problems
Experience with MATLAB signal processing environment
Existing Secret (or above) Clearance

Responsibilities

Proficient in schematic design and BOM generation for higher-speed digital and mix-signal circuit card designs.
Analyze, design, simulate, and implement algorithms in hardware descriptor languages, HDL (VHDL, Verilog), based on customer requirements and/or model(s).
Collaborate with a multi-disciplined design team (electrical engineers, systems engineers and scientists) to design and integrate challenging FPGA designs and RF sensor systems.
Collaborate with a multi-disciplined design team to design and integrate DSP applications for latest System on a Chip (SoC) implementations such as AMD/Xilinx Zynq Ultrascale+, Intel Agilex, and AMD/Xilinx RFSoC.
Analyze, design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation against models.
Perform design constraints generation and verification as well as evaluate synthesis and timing performance reports.
Analyze, design, simulate, and implement designs which interface to common signaling standards, typical IP such as SERDES, PLLS, etc. and/or protocols such PCIe, JESD204B/C, LVDS, etc.
Analyze schematic diagrams for either custom or commercial-off-the shelf (COTS) electronic hardware involving high-speed digital and/or analog circuitry in associated FPGA-centric systems.
Develop and maintain requirements documents, functional specification documents, interface control documents, etc.
Develop project test plans and test procedures, provide test planning support, and assist in the execution of both lab testing and occasional field testing.
Conduct experimental tests on state-of-the-art FPGA and SoC evaluation boards, evaluate results, and then develop specifications for selecting next-generation components.
Work on problems of diverse scope, determining methods and procedures to be used on new assignments, and providing feedback and recommendations to other technical personnel.
Some travel and work at remote sites for limited time periods may be occasionally required.