GPU Software Engineer (CUDA)

Bright Vision Technologies•South Plainfield, NJ

2d•$100,000 - $175,000•Remote

About The Position

Bright Vision Technologies is seeking a GPU Software Engineer with deep expertise in CUDA programming, GPU architecture, and high-performance computing to design and optimize compute-intensive workloads on modern accelerator hardware. The role focuses on maximizing performance for AI training and inference, scientific computing, and high-throughput data processing. The engineer will work with product, design, engineering, operations, and business stakeholders to turn ambiguous requirements into well-engineered solutions. The role also includes contributing to code and design reviews and mentoring more junior engineers, with an emphasis on clear communication, engineering discipline, and delivering production-ready work. This is a full-time, direct W2 position that is 100% remote in the United States. The salary range is $100,000–$175,000 annually. Candidates who are U.S. citizens, Green Card holders, EAD holders, or seeking an H-1B transfer are encouraged to apply; the employer cannot sponsor new H-1B visa petitions for this position.

Requirements

Bachelor’s or Master’s degree in Computer Science, Computer Engineering, or a related field.
Ten or more years of experience in GPU programming and performance engineering.
Deep expertise in CUDA C/C++ and GPU programming models.
Strong understanding of modern GPU architectures, memory hierarchies, and execution models.
Hands-on experience profiling and optimizing GPU workloads in production.
Familiarity with NCCL, MPI, and high-performance interconnect technologies.
Experience integrating custom kernels into ML frameworks.
Strong C++ skills and familiarity with modern systems programming practices.
Solid grounding in linear algebra and numerical methods.
Strong communication and collaboration skills with research and engineering teams.

Nice To Haves

Experience with Triton, CUTLASS, or other GPU kernel authoring frameworks.
Familiarity with TensorRT, FasterTransformer, or vLLM internals.
Exposure to compiler infrastructure such as LLVM or MLIR.
Open-source contributions to GPU or ML performance libraries.
Experience with large-scale distributed training infrastructure.

Responsibilities

Design and implement high-performance CUDA kernels for compute-intensive AI and HPC workloads.
Profile and optimize GPU code using tools such as Nsight Systems, Nsight Compute, and CUDA profilers.
Tune memory access patterns, occupancy, register usage, and shared memory utilization.
Develop optimized libraries for linear algebra, attention, and other ML primitives.
Optimize multi-GPU and multi-node training using NCCL, RDMA, and high-performance networking.
Implement custom operators and fused kernels in PyTorch, JAX, or Triton.
Collaborate with ML engineers to identify performance bottlenecks in training and inference pipelines.
Develop benchmarks and regression tests to safeguard performance over time.
Evaluate new GPU architectures and feature sets, and advise on adoption strategy.
Contribute to compiler-level optimizations for tensor programs at the boundary between ML frameworks and accelerator code generation.
Optimize memory hierarchy usage across HBM, L2, shared memory, and registers.
Implement mixed-precision and quantized compute paths that maximize accelerator throughput while preserving acceptable numerical fidelity.
Document performance characteristics, design decisions, and tuning playbooks for internal teams.
Stay current with GPU architecture, CUDA evolution, and emerging accelerator technologies.
Contribute to code reviews and design reviews and mentor more junior engineers.