GPU Design Engineer

Qualcomm•Austin, TX

About The Position

We are seeking an accomplished Principal‑ or Director‑level technical leader to lead a high‑performance RTL Design and Design Verification organization focused on Qualcomm family of GPU development. This role requires deep hands‑on technical expertise, combined with proven people leadership, to drive architectural excellence, execution rigor, and product delivery at scale. The ideal candidate will bring 20+ years of direct, relevant semiconductor industry experience, including leading, developing and mentoring high performance teams (11+ engineers), while remaining actively engaged in architecture, RTL micro‑architecture, verification strategy, and critical technical decisions. The ideal candidate would have/able to demonstrate the following: Provide hands‑on technical leadership across RTL design and design verification, including architecture reviews, micro‑architecture definition, RTL quality, and verification completeness Actively participate in design reviews, verification strategy reviews, debug of complex issues, and resolution of high‑impact schedule or quality risks Drive best‑in‑class RTL quality, verification coverage, and sign‑off discipline across Qualcomm GPU family of products Influence and shape architecture tradeoffs related to performance, power, area (PPA), scalability, and product robustness Champion adoption of modern verification methodologies, including constrained‑random, coverage‑driven verification, assertions, formal techniques, and automation Excellent communication, organizational and people leadership skills Proven program and execution excellence

Requirements

Possesses a Master’s Degree in Computer Science, Electrical Engineering
20+ years of direct, relevant semiconductor industry experience in RTL design and/or design verification
Proven track record managing large, high‑performance engineering teams
Deep expertise in RTL design (SystemVerilog/Verilog) and design verification methodologies
Extensive experience delivering complex GPU, CPU, and/or ASIC designs from micro-architecture through silicon
Strong understanding of micro‑architecture, verification planning, coverage, debug, and tape‑out readiness
Ability to remain technically hands‑on while operating effectively at the executive and organizational leadership level

Responsibilities

Build, lead, and scale a high‑performance organization of at least 11+ RTL and DV engineers, including senior technical RTL and Design Verification leads
Set clear technical direction, execution priorities, and accountability across multiple parallel programs
Mentor and develop engineers at all levels, fostering strong technical depth, ownership, and engineering excellence
Partner closely with cross‑functional leaders in architecture, physical design, software, SoC, and program management to ensure seamless execution
Own hiring strategy, succession planning, performance management, and career development for the organization
Participate in program design reviews and drive predictable and disciplined execution from micro-architecture through RTL freeze and verification sign‑off
Ensure alignment between technical milestones, staffing plans, and program schedules
Proactively identify risks and lead mitigation strategies to keep programs on track without compromising quality
Establish and optimize processes, metrics, and best practices that enable scale, reuse, and sustained execution velocity