Fab 9 Technology Development GaN Epitaxial Engineer

GlobalFoundries•Essex, VT

32d•Onsite

About The Position

GlobalFoundries is seeking a highly skilled and motivated semiconductor process development engineer to join our Fab9 Technology Development team. This role will focus on developing and qualifying world-class differentiated semiconductor GaN Epitaxial processes for manufacture in the 200mm fabrication facility in Essex Junction, Vermont (Fab9). As a Lead Epitaxy development engineer, you will be responsible for designing and developing discrete semiconductor GaN Epitaxy processes that meet performance, reliability, yield, and cost objectives to drive the advancement of our semiconductor foundry technology offerings for Analog, Mixed Signal, Power, Radio Frequency (RF), and other differentiated market applications. This leadership position will also require providing guidance and strategic project reviews with other technology teams.

Requirements

Minimum Master's degree in electrical engineering, Microelectronics, Material Science, Solid State Physics or other relevant engineering or physical science discipline.
Minimum 1-3 years of relevant engineering experience.
< 10% Travel.
English (written & verbal) language fluency.
Comprehensive knowledge of modern device physics: FET, BJT, LDMOS, and HEMT devices in bulk silicon, silicon-on-insulator (SOI), silicon germanium (SiGe), and/or compound semiconductor (e.g., GaN, SiC, etc.) technologies.
Familiarity with MOCVD III-V Epitaxial Growth Techniques.
Familiarity with semiconductor device electrical testing and analysis methods.
Familiarity with the usage of TCAD to simulate devices.
Knowledge in device reliability mechanisms, device physical characterization (SIMS, TEM, SEM, LSM, Scanning Capacitance, AFM), and device electrical characterization.
Strong problem-solving skills.
The ability to effectively work with colleagues, clients, partners, and unit process engineers.

Nice To Haves

PhD in Electrical Engineering, Microelectronics, Material Science, Solid State Physics or other relevant engineering or physical science discipline.
Minimum 3-5 years of relevant epitaxial growth engineering experience.
Experience and comprehensive knowledge of semiconductor device electrical testing and analysis methods.
Excellent interpersonal skills, energetic, motivated, and self-driven.
Demonstrated ability to work well within a global matrixed team or environment with minimal supervision.
Outstanding communication skills - both written and verbal.
Demonstrated ability to communicate well with all levels of the organization and experience in working with external constituencies.
Strong organizational skills; demonstrated ability to manage multiple tasks simultaneously and able to react to shifting priorities to meet business needs.
Demonstrated ability to meet deadlines and commitments.

Responsibilities

Develop and evaluate MOCVD III-V epitaxial processes, including technology platforms such as bulk silicon, silicon-on-insulator (SOI), silicon germanium (SiGe), and wide band gap semiconductors (e.g., GaN, SiC, etc.).
Define and optimize III-V superlattices, buffers, and device layers according to the Technology Development roadmap.
Plan and manage the processing of wafer lots to meet program schedules.
Perform and evaluate experiments using multiple techniques and failure analysis signals such as SIMS, SEM, TEM, AFM (Atomic Force Microscopy), etc., and collaborate with cross-organizational teams for interpretation.
Address manufacturability challenges such as epitaxial deposit time and selectivity.
Collaborate with various development test, test-site, process, integration, and program management teams within the group to lead the development of new epitaxial processes.
Collaborate with various engineering teams outside the Fab9 Technology Development team (e.g., testing, failure analysis, unit module process, reliability, manufacturing, and research organizations) to facilitate program success.
Collaborate with manufacturing process engineers and characterization teams on evaluations of optimal processes.
Work with semiconductor process teams on novel process integration.
Work with the Reliability team on any issues or concerns with the quality of new semiconductor processes.
Plan, execute, characterize, and determine outcomes/actions of process development learning cycles and document accordingly.
Define process specifications and document Process of Record in controlled engineering specifications.
Document and create process qualification packages for internal Reliability, Manufacturing, and Quality Teams.
Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.