FPGA / VLSI Engineer

E-Space•Saratoga, CA

10d•Onsite

About The Position

We are seeking an FPGA/VLSI engineer to contribute to digital hardware development targeting ASIC/SoC platforms used in advanced communication systems. This role focuses on RTL design, FPGA prototyping, and system integration, working closely with cross-functional teams to deliver high-quality designs. We are redefining how satellites are designed, manufactured and used—so we’re looking for candidates with passion, deep knowledge and direct experience on LEO satellite component development, design and in-orbit activities. If that’s your experience – then we’ll be immediately wow-ed. E-Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role. As a member of our team, you will play a crucial role in driving our success. Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. This means that there will be times when extra hours, including nights and weekends, may be needed to meet critical deadlines and mission goals. In return, we offer a dynamic work environment with opportunities for professional growth and development and the chance to make a meaningful impact in a high-growth industry.

Requirements

Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or related field
Strong experience writing synthesizable SystemVerilog/Verilog
Proven experience with FPGA development flows, including synthesis, implementation, and validation
Solid understanding of digital design fundamentals and timing analysis

Nice To Haves

Experience with SoC FPGA platforms (e.g., Xilinx Zynq, Intel SoC FPGA)
Familiarity with AXI/AHB or similar bus protocols
Exposure to ASIC design flow, including synthesis and STA
Experience with high-speed interfaces (e.g., PCIe, Ethernet)
Knowledge of communication systems (e.g., 5G PHY/MAC concepts)

Responsibilities

Design and implement RTL using SystemVerilog with consideration for timing, power, and area
Perform FPGA prototyping, validation, and hardware bring-up for digital designs
Develop and execute simulation and debugging strategies at block and subsystem levels
Contribute to SoC-level integration, including interfacing with processors, memory, and peripherals
Analyze and resolve timing issues, including setup/hold violations and basic clock domain crossing concerns
Collaborate with verification, ASIC, and software teams to ensure functional correctness and performance
Participate in design reviews and contribute to improving design quality and best practices