FPGA Verification Engineer

Ciena•Remote-US-TX, TX

2d•$94,700 - $151,300

About The Position

FPGA verification engineering plays a key role in delivering reliable Packet-Optical Platform solutions at Ciena. This role contributes to chip-level and block-level verification activities across FPGA designs by developing verification infrastructure, executing verification plans, and driving coverage goals that support product quality.

Requirements

Education: Bachelor's degree OR Master's degree in Engineering or equivalent.
Experience: Minimum 2+ experience as an FPGA/ASIC verification engineer.
Development of testbench environments using SystemVerilog and UVM.
Application of directed and constrained-random stimulus generation.
Problem solving and debugging skills.
Ability to prioritize work and make trade-offs within FPGA design timelines.
Utilization of standard interfaces such as PCIe, I2C, and SPI, and application of Ethernet packet structures and interfaces, including CAUI, XLAUI, XAUI, and XFI.
Experience with Mentor Graphics and/or Synopsys verification tools.

Nice To Haves

Excellent verbal and written communication skills.
Ability to work independently and in a team environment and willingness to learn new skills.
Excellent interpersonal and team skills.
Highly motivated and creative.
Well organized, thorough, and detail oriented.

Responsibilities

Establish verification methodology, architecture, and infrastructure, including models, generators, monitors, and scoreboards.
Collaborate with the design team to define test priorities and coverage targets
Create verification plans
Create and execute test cases
Create and maintain regression suites and provide verification reports
Participate in chip-level verification activities for FPGA designs
Participate in block-level verification activities for FPGA designs