FPGA Engineering Intern

Intuitive • Sunnyvale, CA

23d

About The Position

It started with a simple idea: what if surgery could be less invasive and recovery less painful? Nearly 30 years later, that question still fuels everything we do at Intuitive . As a global leader in robotic-assisted surgery and minimally invasive care , our technologies—like the da Vinci surgical system and Ion —have transformed how care is delivered for millions of patients worldwide. We’re a team of engineers, clinicians, and innovators united by one purpose: to make surgery smarter, safer, and more human. Every day, our work helps care teams perform with greater precision and patients recover faster, improving outcomes around the world. The problems we solve demand creativity, rigor, and collaboration. The work is challenging, but deeply meaningful—because every improvement we make has the potential to change a life. If you’re ready to contribute to something bigger than yourself and help transform the future of healthcare , you’ll find your purpose here. Primary Function of Position In the Advanced Robotic Systems Development group, our team designs and develops the robotic platforms that will transform the surgical landscape, to make robotics the default option for surgery. As a FPGA Intern reporting to the Software/FPGA Manager, you’ll work with the Advanced Development group to design, develop, test and document key features for a prototype surgical robotics platform. You’ll develop a system-level understanding of the platform and have an impact on the entire FPGA and SW to integrate develop applications geared towards Robotics and Motor Control Applications.

Requirements

• University Hiring Program Eligibility Requirements:
• University Enrollment: Must be currently enrolled in and returning to an accredited degree-seeking academic program after the internship.
• Internship Work Period: Must be available to work full-time (approximately 40 hours per week) during a 10-12 week period starting May or June. Specific start dates are shared during the recruiting process.
• Required Education and Training Current enrollment in a relevant engineering program such as Mechatronics, Computer Engineering, Electrical Engineering, or Computer Science at the Bachelor’s, Master’s or advanced degree-seeking program

Nice To Haves

• Experience with FPGA tools (e.g., Vivado/Quartus), simulation, and waveform debugging
• Basic understanding of fixed-point math / DSP concepts
• Familiarity with common interfaces (SPI/I2C/UART) or memory-mapped register design
• Exposure to embedded debugging tools (JTAG/SWD, gdb, logic analyzer/oscilloscope)
• Experience/familiarity with microcontrollers and common motor control peripherals.
• Ability to solve complex and ambiguous problems.

Responsibilities

• Assist with implementing and debugging RTL in Verilog/SystemVerilog and/or VHDL.
• Create or extend simulation testbenches and help analyze waveform/debug results.
• Support FPGA builds, basic validation, and debug during lab bring-up.
• Write or modify small C/C++ utilities/drivers to exercise FPGA registers and interfaces.
• Help validate FPGA–processor communication (e.g., memory-mapped registers, interrupts, simple serial links).
• Debug, root cause, and fix critical bugs.
• Document and test your code, participate in code reviews.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern
• Number of Employees: 5,001-10,000 employees