FPGA Design Lead - Digital Signal Processing (DSP)

BAE Systems•Nashua, NH
•$149,603 - $254,317•Onsite

About The Position

The Electronic Combat Solutions Hardware Engineering Group is seeking a Senior Principal II FPGA Design Engineer to lead and develop a team of FPGA designer engineers through all phases of development. The ideal candidate is expected to perform activities including requirements generation and design architecture; technical oversight and mentoring of team members; as well as ownership of RTL coding, synthesis, basic test bench development, lab testing, and product support. This position will be performed full-time on site due to the need for consistent, in-person collaboration and the requirement to perform all work onsite.

Requirements

  • 10+ years of relevant experience with bachelor's degree (less with an advanced degree)
  • Current Security Clearance (Secret), or eligible to obtain one
  • Ability to distill higher level requirements into micro-architecture
  • Extensive experience in FPGA (preferred) or ASIC Design / Development
  • Experience leading/managing a design team
  • Experience with DSP fundamentals
  • Working understanding of Radar systems and/or EW systems
  • Proficient in VHDL (preferred) or Verilog HDL coding
  • Familiarity with Xilinx Vivado/ISE or Altera Quartus
  • Digital simulation using Modelsim/Questa
  • Strong understanding of timing driven design including clock domain crossing circuitry
  • Strong lab debug and problem solving skills
  • Strong written and oral communication skills
  • Ability to mentor and willingness to be mentored
  • Experience with high-speed interfaces like PCIe, SerDes, ADC/DAC, DDR3/4
  • Familiarity with revision control (GIT, CVS, Clearcase, Subversion, etc.)
  • Proficient in Tcl/Tk and UNIX/Linux shell programming

Nice To Haves

  • Experience with FPGA implementation
  • Experience with Matlab/Simulink
  • Experience creating unique designs and supporting legacy designs
  • Experience with UVM/System Verilog
  • Some experience with managing schedule and cost is beneficial
  • Experience with C/C++, Perl and Python

Responsibilities

  • Lead and develop a team of FPGA designer engineers through all phases of development.
  • Perform activities including requirements generation and design architecture.
  • Provide technical oversight and mentoring of team members.
  • Ownership of RTL coding, synthesis, basic test bench development, lab testing, and product support.

Benefits

  • health, dental, and vision insurance
  • health savings accounts
  • a 401(k) savings plan
  • disability coverage
  • life and accident insurance
  • employee assistance program
  • legal plan
  • discounts on things like home, auto, and pet insurance
  • paid time off
  • paid holidays
  • paid parental leave
  • military leave
  • bereavement leave
  • any applicable federal and state sick leave
  • company recognition program
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