Entry-Level FPGA Design Engineer

Space Dynamics Laboratory•North Logan, UT

1d•$90,000 - $140,000•Onsite

About The Position

Space Dynamics Laboratory (SDL) is seeking a junior FPGA design engineer to contribute to the design, fabrication, testing, and support of electronics for telecommunication hardware used in space vehicles and sensor payloads within the CVS Division. The role involves all aspects of payload algorithm discernment, development, optimization, and testing. The engineer will collaborate with internal and external electronics teams, taking ownership of assigned design blocks from concept through integration and testing. The Civil & Commercial Space (CVS) Division focuses on scientific research and space exploration, providing state-of-the-art sensors, satellites, and AI&T technologies for government and commercial missions, tackling challenges in planetary science, Earth observation, heliophysics, and astrophysics.

Requirements

Must be a U.S. citizen, lawful permanent resident of the U.S., or other U.S. Person
Bachelor’s degree in electrical and/or computer engineering
Comfortable with basic digital and analog circuits
Comfortable with FPGA design
Comfortable with embedded software
Comfortable with ground support equipment
Comfortable with automated test scripting
Experience with FPGA debugging tools and hardware troubleshooting equipment
Experience with static timing analysis and timing closure
Hands-on testing and handling of space electronics in a laboratory environment

Nice To Haves

Expertise with digital communications
Expertise with CCD applications and supporting peripherals
Experience working on NASA (or other US government) funded projects
Master’s Degree

Responsibilities

Assist with the design, fabrication, test and support of electronics for telecommunication hardware for space vehicles and sensor payloads.
Be involved in all aspects of payload algorithm discernment, development, optimization, and testing.
Work as part of larger electronics teams, internal and external to the organization.
Own all aspects of their assigned block of the design from concept to integration and test.