Firmware Architect

TYLsemi • San Jose, CA

3d • $150,000 - $300,000

About The Position

Firmware & Embedded Software Architecture Leadership: Own the end-to-end firmware/embedded-software architecture for TYL chiplets. This includes on-die components such as boot and secure boot, link sequencing, PCIe/CXL controller configuration and enumeration, address-translation (NTB/ATT) setup, MSI-X and AER handling, reset/FLR, power management, telemetry, and in-field firmware update. It also covers host-side components like kernel drivers, the device-virtualization/transparency shim (synthetic PCIe device, VFIO-mdev-class), management libraries/APIs, and IOMMU (VT-d/SMMU) coordination. The role involves defining the hardware/software boundary with architecture and RTL, focusing on datapath (credit, ordering, merge/split, address-translation execution) in RTL and control plane in firmware, and owning register maps and UCIe sideband/mailbox protocols. The architect will stay hands-on through first silicon.

Bring-up, Methodology & Quality: Drive pre-silicon firmware and host-software development on emulation and virtual platforms, and lead post-silicon bring-up and debug. This includes establishing the firmware engineering infrastructure: CI, automated and HIL testing, requirements traceability, secure-development practices (secure boot, attestation, key management), and the RAS/error-handling and fault-attribution strategy. The role also defines firmware release, quality, and security criteria across products and customers.

Cross-functional & Customer Collaboration: Act as the technical bridge between firmware/software and architecture, RTL, PHY/IP vendors, and program management, integrating software feasibility into hardware decisions early. Collaboration extends to working directly with customers, including compute-SoC partners on PCIe/CXL enablement and ATE/SLT integrators on firmware and management libraries.

Team Building & Management: Set technical direction, roadmap, and clear subsystem ownership for areas including boot/security, PCIe/CXL management, host drivers and virtualization, and RAS/telemetry.

Requirements

• BS/MS in Electrical / Computer Engineering or Computer Science
• 12+ years of embedded firmware development, with at least 5 years in silicon-level bring-up and validation of high-speed interface IPs.
• Expert-level C and assembly for resource-constrained embedded CPUs (RISC-V or Arm Cortex-M/R class); strong debugging skills using JTAG/OpenOCD, trace, and logic analysers.
• Deep PCIe expertise: link-training state machine, equalization (Gen3 EQ/LFSR, Gen4/5 preset search, Gen6/7 Flit Mode), speed-change sequences, LTSSM register-level behaviour.
• Hands-on experience with HPC compute SoC firmware ecosystems — UEFI/BIOS bring-up, ACPI table authoring, SMBus/I2C/MCTP platform management, VT-d/IOMMU configuration — on HPC platforms.
• Solid understanding of x86 server platform boot flow: SEC → PEI → DXE → BDS, PCIe enumeration in PEI/DXE, Option ROM interaction, and PCIe error-recovery paths (AER, DPC).
• Experience with secure-boot architectures, code-signing flows, and OTA update mechanisms on embedded targets.
• Comfortable working at the hardware-software boundary: reading RTL schematics, memory-mapped register specs, and waveforms from simulation or a logic analyser.

Nice To Haves

• CXL 2.0/3.0 firmware experience: HDM decoder programming, CXL IDE, DVSEC, BISnp coordination.
• UCIe / die-to-die sideband firmware experience (RDI/FDI parameter negotiation, sideband messaging).
• SPDM (DSP0274) and CMA device-attestation implementation experience.
• Familiarity with PLDM for firmware update (DSP0267) and platform telemetry (DSP0248).
• ATE scripting background — Teradyne UltraFLEX / Advantest T2000 board-level bring-up scripts.
• Exposure to chiplet packaging concepts (UCIe, EMIB, CoWoS) and multi-die power-sequencing considerations.
• Kernel-mode driver or UEFI DXE driver development experience.

Responsibilities

• Own the end-to-end firmware/embedded-software architecture for TYL chiplets.
• Define the hardware/software boundary with architecture and RTL.
• Stay hands-on through first silicon.
• Drive pre-silicon firmware and host-software development on emulation, and virtual platforms, and lead post-silicon bring-up and debug.
• Stand up the firmware engineering infrastructure: CI, automated and HIL testing, requirements traceability, secure-development practices (secure boot, attestation, key management), and the RAS/error-handling and fault-attribution strategy.
• Define firmware release, quality, and security criteria across products and customers.
• Be the technical bridge between firmware/software and architecture, RTL, PHY/IP vendors and program management — bringing software feasibility into hardware decisions early.
• Work directly with customers: compute-SoC partners on PCIe/CXL enablement, ATE/SLT integrators on the firmware and management libraries.
• Set technical direction, roadmap, and clear subsystem ownership (boot/security, PCIe/CXL management, host drivers and virtualization, RAS/telemetry).

What This Job Offers

• Job Type: Full-time
• Career Level: Senior