Firmware Architect – High-Speed Interconnect (PCIe / OCI)
About The Position
AMD is transforming the industry with our EPYC server platform and AI-centric graphics solutions. Our mission is to design world-class products that power the next generation of Data Centers, Artificial Intelligence (AI), High Performance Computing (HPC), and next‑generation server platforms. If you are passionate about defining next-generation interconnect architectures and firmware innovation, join our Data Center organization to help shape the future of scalable, high-performance systems. We are seeking a highly experienced Firmware I/O Interconnect Architect to lead the definition and evolution of next-generation firmware architectures for high-speed interconnects. This role will focus on PCIe Gen 6/7/8 and emerging Optical Component Interconnect (OCI) technologies, driving scalable, high-performance, and robust solutions across AMD’s server platforms. You will play a key role in shaping firmware architecture strategy, influencing silicon design, and enabling industry-leading interconnect capabilities.
Requirements
- Extensive experience in firmware and system architecture with a focus on high-speed I/O and interconnect technologies.
- Deep expertise in PCIe (Gen 4/5/6+) with strong familiarity or emerging knowledge of PCIe Gen 7/8 and Optical Interconnect technologies.
- Strong understanding of server platform architecture, including CPU/GPU interconnects, memory hierarchy, and high-speed signaling constraints.
- Proven experience in firmware design for complex hardware/software interfaces and system-level flows (boot, enumeration, link training, error handling).
- Experience with platform bring-up, pre/post-silicon validation, and debugging complex I/O and firmware issues.
- Demonstrated ability to influence architecture and drive cross-organizational alignment.
- Excellent communication skills with the ability to operate effectively at architecture, implementation, and executive levels.
- Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent
Responsibilities
- Define and drive firmware architecture for next-generation I/O interconnects, including PCIe Gen 7/8 and OCI, ensuring scalability, performance, and robustness.
- Lead the adoption and integration of advanced interconnect technologies, collaborating with hardware architecture and silicon teams to influence design decisions and standards alignment.
- Partner with system architecture, silicon design, validation, and platform software teams to deliver cohesive end-to-end solutions across pre- and post-silicon phases.
- Guide platform bring-up, debug, and optimization for complex I/O subsystems, ensuring high reliability and performance in production environments.
- Stay at the forefront of industry trends and standards (PCIe, CXL, OCI), contributing to AMD’s leadership in next-generation interconnect ecosystems.
Benefits
- AMD benefits at a glance.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
