Failure Analysis OFI Engineer

Samsung Electronics•Taylor, TX

1d•$76,000 - $145,000•Onsite

About The Position

The primary function of this position is to apply failure analysis methods and techniques to provide timely and accurate support for failure analysis submissions utilizing OFI (Optical Fault Isolation) tools, primarily Photon and Thermal emission type. Tasks include setting up a testing plan for each assigned job, which includes reviewing background information, hardware readiness, timeline estimation, testing plan, and reporting findings to internal and external customers. This job primarily revolves around utilizing fault isolation tools, ATE tools, and reporting your findings to outside groups. Successful candidate would should have strong multi-tasking skills and be ready to contribute in a fast-paced semiconductor environment. Flexibility in work schedule is required. 3 – 6 months on job training (OJT) will be provided to successful candidate.

Requirements

B.S. to PhD in Electrical/Electronic Engineering, Material Science, Physics or closely related discipline.
Good understanding of semiconductor FinFET fabrication process and semiconductor device physics (e.g Transistor, PN Junctions).
Basic knowledge and understanding of wafer/die level semiconductor Automated Test Equipment (ATE) tests and FA methodologies.
Strong analytical thinking and problem-solving ability.
Strong project management, written and verbal communication skills.
Teamwork oriented player with good communication and interpersonal skills.
Able to work in fast paced and multi-tasking environment.
All positions at Samsung Austin Semiconductor are full-time on-site.
This role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.

Nice To Haves

Able to refine complex FA data into Fab language summary in generating FA report is a plus.
Hands-on experience on FA tools and techniques (SEM, FIB, PVC, OBIRCH & PEM) or ATE systems such as Teradyne UFLEX, Advantest V93K or T2000 is a plus.
Able to interpret FA and electrical ATE test data from die level down to transistor level is a plus.
Able to interpret and understand Wafer Level Reliability stress data such as TDDB, HCI, HTOL etc is a plus.
Experience with layout software (Camelot and/or Avalon) is a plus.
Experience in handling customer returns FA is a plus.
Experience in developing new FA techniques and automation scripts using Python is a plus.

Responsibilities

Conduct physical failure analysis from low yield lots, baseline material, qualifications, and customer requests.
Identify the cause of failure by performing the sample selection, identifying the optimal analysis techniques to apply to ensure fast and accurate results for both internal and external customers.
Support manufacturing and engineering teams with physical failure analysis results for new process and product introduction, and product transfer activities with Integration and Process Engineering teams.
Represent the Analysis Engineering department in foundry customer meetings providing on time analysis results.
Analyze electrical as well as imaging results to find the root cause of issues and publishing them to team members and customers.
Recommend analysis approach based on customer’s failure mode data as well as our own electrical isolation results and abilities.
Generate and compile quality FA reports to internal and external customers to assist in issue resolution.