Engineering Internship 2027

Riverlane • Boston, MA

11d • $35 - $42 • Hybrid

About The Position

Riverlane is hiring an Engineering Intern for a full-time, fixed-term internship based at its US office in Cambridge, Massachusetts. The internship is hybrid and lasts 10 to 12 weeks. The intern will investigate classical computing architectures needed to support scalable, fault-tolerant quantum computers, working at the intersection of quantum error correction, computer architecture, and hardware-software co-design. Project work may involve efficient QEC decoding or predecoding methods, modeling classical resources required by fault-tolerant quantum programs, or exploring how decoding workloads can be distributed across a computing system.

The intern will work alongside Riverlane researchers and engineers with support from a dedicated supervisor. Their work will contribute to understanding how QEC systems can meet the performance needs of increasingly large quantum computers. The position pays $35–$42 per hour, depending on experience. Reasonable role-related expenses, such as approved travel to meetings or conferences, will be reimbursed; travel to and from Cambridge at the start or end of the internship and accommodation during the internship are not covered.

Applicants must be current students pursuing a bachelor’s degree (second year or later) or a master’s degree and must be authorized to work in the United States for the internship’s duration. Applicants using CPT, OPT, or another student employment authorization are responsible for securing the required approval before the start date. Any offer is contingent on verification of identity and work authorization. The intern must sign an agreement assigning ownership of intellectual property produced during the internship to Riverlane.

Riverlane describes its workplace as diverse and collaborative, bringing together specialists in software and hardware development, quantum information theory, physics, mathematics, and other technical fields. Its global team represents more than 20 nationalities. The company provides free snacks and refreshments and organizes regular social and cultural events. Riverlane is an equal opportunity employer and provides reasonable accommodations to applicants with disabilities.

Requirements

• Be a current student at the time of application, studying toward a bachelor’s degree (second year or later) or a master’s degree.
• Have experience in at least one of the following areas: quantum error correction or fault-tolerant quantum computing; computer architecture or quantum-classical systems; decoding algorithms or error-correcting codes; FPGA, ASIC, or digital hardware design.
• Have experience developing computational models, simulations, or research software.
• Be proficient in Python, C, C++, or another relevant programming language.
• Have a strong understanding of computer systems and architecture.
• Have excellent analytical and problem-solving skills.
• Be able to communicate complex technical ideas clearly.
• Be able to take initiative and work effectively with researchers and engineers from different disciplines.
• Be legally authorized to work in the United States for the duration of the internship; required student-employment authorization approvals must be obtained before the start date.
• Be available to work full-time for 10 to 12 weeks.
• Sign an agreement assigning ownership of intellectual property produced during the internship to Riverlane.

Nice To Haves

• Experience researching quantum LDPC or surface codes.
• Familiarity with QEC decoding or predecoding techniques.
• Experience exploring the classical resource requirements of fault-tolerant quantum computing.
• Experience with hardware-software or compiler-hardware co-design.
• Experience with RTL, SystemVerilog, FPGA, or ASIC development workflows.
• Understanding of latency, bandwidth, or power constraints affecting quantum control and decoding systems.
• Experience with scientific computing, quantum circuit simulation, or QEC simulation tools.
• Contributions to academic publications, open-source software, or collaborative research projects.

Responsibilities

• Contribute to a research project focused on the classical systems and architectures required for scalable quantum error correction.
• Investigate methods for reducing compute, communication, memory, latency, or power requirements associated with QEC.
• Develop algorithms, simulations, or architectural models to evaluate potential approaches.
• Explore trade-offs between decoding performance, logical error suppression, and classical resource requirements.
• Consider how QEC workloads could be implemented across software, FPGA, ASIC, or other computing architectures.
• Collaborate with researchers and engineers working across QEC theory, decoding, software, and hardware.
• Analyze results and communicate findings through technical discussions, presentations, and written reports.
• Produce clear, reproducible research code and supporting documentation.

Benefits

• Reimbursement of reasonable expenses incurred as part of the role, such as approved travel to meetings or conferences.
• Free snacks and refreshments.
• Regular social and cultural events.
• Reasonable accommodations for applicants with disabilities.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern