Emulation Technical Leader

Cisco•San Jose, CA
•Remote

About The Position

As an ASIC DFT - Emulation Technical Leader, you will play a critical role in driving the DFT emulation strategy for Silicon One’s DFT team. This is a rare opportunity to own and define the DFT emulation strategy for Silicon One—the silicon powering the world’s most advanced multi-terabit networks. Instead of just maintaining existing flows, you will architect our pre-silicon emulation roadmap from scratch, build a high-performing engineering team, and set the standard for validating complex scan, MBIST, and JTAG architectures on platforms like Palladium, Veloce, and Zebu. Working directly with RTL, physical design, ATPG teams, and top-tier vendors, you’ll drive seamless silicon bring-up and push the boundaries of multi-terabit validation. Opportunities to spearhead a greenfield emulation strategy for hardware at this scale don't come around often—step in, lead the team, and shape the future of Silicon One.

Requirements

  • Bachelors + 12 years of related experience, or Masters + 8 years of related experience, or PhD + 5 years of related experience.
  • Prior emulation experience on platforms such as Palladium, Veloce, or Zebu.
  • Experience with compilation and debug.
  • Prior experience with Verilog and System Verilog.
  • Prior experience with C/C++ and scripting skills with Tcl or Python/Perl.

Nice To Haves

  • Prior experience defining DFT Emulation strategy.
  • Prior experience with JTAG protocol, scan architecture, MBIST and boundary scan.
  • UVM and advanced System Verilog knowledge.
  • Post Silicon validation and/or debugging experience.

Responsibilities

  • Drive the DFT emulation strategy for Silicon One’s DFT team.
  • Architect the pre-silicon emulation roadmap from scratch.
  • Build a high-performing engineering team.
  • Set the standard for validating complex scan, MBIST, and JTAG architectures on platforms like Palladium, Veloce, and Zebu.
  • Work directly with RTL, physical design, ATPG teams, and top-tier vendors.
  • Drive seamless silicon bring-up.
  • Push the boundaries of multi-terabit validation.

Benefits

  • medical, dental and vision insurance
  • a 401(k) plan with a Cisco matching contribution
  • paid parental leave
  • short and long-term disability coverage
  • basic life insurance
  • 10 paid holidays per full calendar year
  • 1 floating holiday for non-exempt employees
  • 1 paid day off for employee’s birthday
  • paid year-end holiday shutdown
  • 4 paid days off for personal wellness
  • 16 days of paid vacation time per full calendar year (non-exempt employees)
  • flexible vacation time off program (exempt employees)
  • 80 hours of sick time off provided on hire date and each January 1st thereafter
  • up to 80 hours of unused sick time carried forward from one calendar year to the next
  • Additional paid time away may be requested to deal with critical or emergency issues for family members
  • Optional 10 paid days per full calendar year to volunteer
  • annual bonuses (for non-sales roles)
  • performance-based incentive pay (for sales roles)
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service