About The Position

Our Machine Learning Acceleration (MLA) team develops the Inferentia and Trainium SoCs that are used to power today’s AI workloads in datacenters all around the world. As a Sr. SoC EMIR Engineer, you’ll contribute to the EMIR sign-off of our SoCs and help maintain a high bar on quality. We’re searching for an experienced EMIR engineer with a proven track record of handling challenges at scale. In this role, you’ll be working directly with architects, designers, verification engineers, power integrity engineers and physical design experts - defining best practices in power grid design, developing test cases & vectors to model demand currents accurately, modeling & signing-off EMIR taking into account board and package impact, advancing the state-of-the-art in EMIR analysis and modeling.

Requirements

  • Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
  • Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
  • Understanding of Physical Design, EM/IR, Power Integrity, and Thermal at the die, package, board, and server level

Nice To Haves

  • Master's degree in Electrical or Communications Engineering or a related field
  • Experience with formal verification techniques including abstraction and end-to-end checking
  • Experience with ARM and various DSP ISAs
  • Familiarity with Make or similar for automation of EMIR rollups
  • Experience with RTL design (System verilog)
  • Experience with PnR tools (FusionCompiler or Innovus)
  • Familiarity with Power analysis tools (PrimePower or similar)
  • Familiarity with timing analysis tools (PrimeTime or similar)
  • Experience with lab equipment and lab power analysis

Responsibilities

  • Design & analyze power grids
  • Setup flows for EMIR analysis
  • Run EMIR analysis for large subsystems, SoCs
  • Partner with EDA tool vendors to develop / evaluate new methodologies for EMIR analysis
  • Develop and maintain dashboards for EMIR rollups
  • Work with designers, architects, Verification engineers and Physical Design engineers to develop vectors for IR analysis, Thermal analysis and power estimation
  • Design and evaluate power grids
  • Working with designers, architects and verification engineers to come up with worst-case vectors for power and IR analysis
  • Root cause causes of low annotation or low switching coverage with vectors
  • Develop & maintain dashboards to track EMIR status
  • Root cause causes of IR drop and suggest solutions to fix
  • Combine IR analysis of SoC with IR at board and package level (concurrent IR analysis)
  • Do post-silicon power measurements and correlate with simulation.
  • Innovate on ways to model VR, board and package impact on voltage drop more accurately.
  • Partner with EDA tool vendors to develop / evaluate new methodologies for EMIR analysis

Benefits

  • health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
  • 401(k) matching
  • paid time off
  • parental leave
  • sign-on payments
  • restricted stock units (RSUs)
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