DSP/ FPGA Engineer

Young Community Developers • Portland, OR

5d • $110,000 - $150,000 • Onsite

About The Position

DZYNE Technologies was recently acquired by Ondas Inc. (NASDAQ: ONDS) and, together with World View, has joined forces to create Ondas Sentinel. Ondas Sentinel is a next‑generation U.S. defense platform integrating long‑endurance ISR, autonomous systems, counter‑UAS technologies, and mission intelligence. While DZYNE is now part of Ondas Sentinel, we are still legally operating as DZYNE as we complete the formal integration of our systems and processes. As a result, you may see roles cross‑posted across DZYNE and World View, during this transition. All positions represent opportunities within the same combined organization. What does this mean for candidates? You’re joining a team that is accelerating the future of autonomous defense. You’ll be part of a company backed by significant investment, strong growth, and mission‑proven technology. You’ll work alongside world‑class engineers and innovators who have already delivered thousands of operational flight hours, high‑impact ISR capabilities, leading counter‑UAS systems, and breakthrough autonomous effects. You’ll help shape a unified platform that enables operators to see more, decide faster, and act with confidence across the modern battlespace. Together, Ondas Sentinel is building something bigger than any one company, a scalable, integrated defense organization designed to meet emerging mission needs with speed, precision, and purpose. If you’re energized by ambitious missions, rapid innovation, and a chance to help define the future of autonomous defense, we’d love to have you on the team. DZYNE has an immediate need for a talented Engineer capable of helping design, build, and bring to market a self-contained SDR system. As the DPS / FPGA engineer, you will play a central role in defining and building this next evolution. You’ll take ownership of the FPGA-level DSP pipeline, work across hardware and software boundaries, and help turn a research-grade design into a reliable, manufacturable, and high-performance embedded radio system. You will architect, implement, and optimize the FPGA and embedded DSP subsystems, working closely with our software, electrical and mechanical engineers to take a laboratory prototype and turn it into a production ready device.

Requirements

• 3+ years’ experience in a related field such as Aerospace, Defense or Telecommunications
• Strong hands-on experience with FPGA development (Verilog or VHDL)
• Demonstrated experience with DSP algorithms implemented in FPGA logic
• Familiarity with SDR platforms (bladeRF, USRP, LimeSDR, or similar)
• Solid understanding of deterministic real-time digital signal processing
• Experience with high-throughput data movement (DMA engines, streaming interfaces)
• Ability to translate software-based algorithms (GNU Radio, C/C++, Python) into hardware-accelerated implementations
• Comfortable working with embedded Linux environments and low-level drivers
• Proficiency with lab tools (spectrum analyzers, signal generators, oscilloscopes)

Nice To Haves

• Experience with Cyclone or Zynq-class SoC FPGAs
• Familiarity with USB 3.0 data pipelines or PCIe interfaces
• Background in PHY and MAC design with custom protocols
• Experience designing highly parallelized DSP pipelines
• Experience designing register maps and FPGA ↔ CPU control interfaces
• Understanding of RF front-end components (PLL, mixers, filters, LNAs)
• Knowledge of Yocto/Buildroot or similar embedded Linux build systems

Responsibilities

• Design, implement, and optimize FPGA-based DSP pipelines for SDR applications
• Modify and extend existing bladeRF FPGA images (Cyclone) or similar FPGA-based SDR platforms
• Develop deterministic, real-time signal-processing modules (filters, mixers, decimators, burst detectors, timing cores, modulators, demodulators)
• Collaborate with embedded Linux engineers integrating FPGA subsystems into a coherent SDR architecture
• Interface FPGA logic with CPU systems via DMA, streaming interfaces, USB3, or AXI-style equivalents
• Contribute to architecture decisions for next-generation hardware (RF front end, FPGA partitioning, FPGA ↔ CPU interfaces)
• Work with RF engineers when integrating new front-end components or improving timing stability
• Participate in lab bring-up, validation, and field testing
• Document FPGA modules, APIs, and register maps for internal and external use

Benefits

• Comprehensive healthcare benefits package
• Base dental, vision, life, accident, disability, and other core benefits are fully covered by DZYNE
• Paid time off
• Paid holidays
• 401 (k) plan with an employer match and immediate vesting

What This Job Offers

• Job Type: Full-time
• Career Level: Senior