DSP Architect

Marvell Technology•Santa Clara, CA

10d•$119,620 - $179,200

About The Position

Join Marvell’s Data Center Engineering (DCE) Connectivity DSP Team, where we design and develop high-speed, low-power electrical and optical transceivers using PAM4 and advanced modulation schemes with FEC (Forward-Error-Correction). Our DSP solutions power AI, cloud, enterprise, and 5G infrastructure by enabling the high bandwidth interconnects essential for modern data centers. As an DSP Architect, you will have the opportunity to contribute to the system design and development of next-generation DSP architectures, while gaining hands-on experience in a leading technology group.

Requirements

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5+ years of related professional experience OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2+ years of experience.
Completed graduate coursework in at least two of the following areas: Digital Signal Processing, Digital Communications, Information Theory, Coding Theory, Probability Theory.

Nice To Haves

Strong R&D experience in Probability Theory, Detection and Estimation Theory, Coding Theory, Digital Communications, or Digital Signal Processing.
Excellent analytical and problem-solving skills.
Effective verbal and written communication skills.
Proficiency in C++, MATLAB, or Python.
Knowledgeable about typical optical components used in communication systems, including lasers/modulators/filters/photodetectors/TIAs.
Experience in high-speed DSP, especially FFE/DFE, adaptive filters, Clock and Data Recovery (CDR), forward error correction, Maximum likelihood sequence detection
Experience with signal integrity and ADC based wireline transceiver is a plus.
Experience with either direct-detect/intensity modulated or coherent optical communication is a plus.
Team player, willing to take on a variety of projects, good listening skills, self-motivated.

Responsibilities

Architect and simulate advanced DSP systems; define key features, performance targets, and detailed specifications to guide both analog and digital design teams.
Conduct research in digital signal processing techniques for high‑speed SerDes and optical communication channels.
Prototype innovative algorithms for equalization, adaptation, and forward error correction (FEC), evaluating their feasibility and performance.
Develop and validate new DSP algorithms in C++, MATLAB, or Python within a simulation environment.
Build bit‑true models of DSP architectures and collaborate closely with design and verification teams to ensure accurate hardware implementation.
Participate in chip bring‑up activities and work hands‑on in a fast‑paced lab environment to debug and validate system behavior.