Distinguished Technologist - Memory/Storage Utilization & Data Placement Architect

HP•Spring, TX

26d•$190,000 - $274,000

About The Position

This role defines how memory and storage are jointly utilized as a unified data hierarchy for AI workloads, optimizing data placement, movement, and persistence. It applies technical and business expertise to establish strategy and roadmaps, identify future growth opportunities, address gaps with innovative solutions, collaborate with stakeholders, and lead industry-leading research and development. The position develops long-term vision and strategy for electrical hardware design and development across feature areas and divisional boundaries. It provides technical leadership and consultation for product development and design reviews, integrates advanced technologies with impact across disciplines, communicates roadmaps to executives, industry partners, and customers, and mentors less-experienced staff. The role also contributes to selecting future technical leaders. The recommended background is a four-year or graduate degree in Electrical Engineering or a related discipline, or commensurate work experience or demonstrated competence. Typically, the role requires 12 or more years of work experience, preferably in electrical design and tools, software packages, electronic hardware architecture, or a related field. The position is full-time. The stated annual pay range is $190,000 to $274,000, with additional opportunities for bonus and/or equity for U.S. candidates. Compensation varies by work location, job-related knowledge, skills, and experience.

Requirements

Four-year or graduate degree in Electrical Engineering or another related discipline, or commensurate work experience or demonstrated competence.
Typically 12 or more years of work experience, preferably in electrical design and tools, software packages, electronic hardware architecture, or a related field.
Knowledge and skills in memory design, computer engineering, computer science, debugging, electrical engineering, electronic engineering, electronics, FPGA, hardware architecture, hardware design, MATLAB, mechanical engineering, new product development, oscilloscopes, physics, printed circuit boards, schematic capture, simulations, and systems design.
Cross-organizational skills in effective communication, results orientation, learning agility, digital fluency, and customer centricity.

Responsibilities

Architect memory and storage hierarchies, including DRAM, SSD, and cache layers.
Define policies for data placement and movement across tiers, including hot and cold data.
Optimize paging, prefetching, and streaming for AI inference and training.
Partner with software teams to co-optimize models across memory and storage for AI performance.
Enable efficient use of storage as a memory extension, including spillover and KV cache strategies.
Collaborate with operating system and runtime teams on data orchestration.
Evaluate emerging approaches such as unified memory, memory pooling, and compression.
Define long-term vision and strategy for electrical hardware design and development across multiple feature areas and divisional boundaries.
Develop technology roadmaps for electrical and hardware engineering teams and identify gaps and solutions for future growth.
Communicate strategy and technology roadmaps to executive staff, industry partners, and customers.
Develop innovative solutions and integrate advanced technologies, theories, or techniques with significant impact across disciplines.
Champion large projects supporting long-range goals.
Provide consultation, design input, and feedback for new product development and design reviews across organizations and architectures.
Collaborate with product management and engineering stakeholders from related departments to help teams deliver impactful results.
Initiate industry-leading research and development and serve as a recognized lead authority internally and externally.
Mentor and guide less-experienced staff in electrical hardware design and development, innovation, and excellence.
Participate in and provide input on processes for selecting future technical leaders.