Full Time Raytheon 2026 - Digital Design Electrical Engineer II

RTXMcKinney, TX
$68,900 - $131,100Onsite

About The Position

Raytheon Intelligence & Space is seeking a motivated Entry-Level Digital Design Engineer to support product development for defense applications. This position is based in McKinney, Texas. The selected candidate will contribute to the development of ASICs, and/or Field Programmable Gate Array (FPGA) designs by supporting requirements development, architecture implementation, design, analysis, and laboratory testing. Working under the guidance of experienced engineers, the candidate will assist in translating system-level requirements into hardware designs and help verify functionality through simulation and hands-on testing. The ideal candidate will have a foundational understanding of digital design concepts, including microprocessors, memory, FPGAs, ASICs, and common interface protocols, with a strong desire to expand their technical knowledge. In this role, the candidate will collaborate with cross-functional teams, including systems, mechanical, and software engineers, to develop innovative solutions for defense programs. They will also support engineering reviews, documentation, and verification activities while gaining experience working with customer requirements and product development processes. This position offers opportunities for professional growth and may require occasional business-related travel.

Requirements

  • Master’s degree in electrical engineering, Computer Engineering or related Science, Technology, Engineering, or Mathematics (STEM) major.
  • Experience with FPGA’s (Xilinx/Altera), RTL design (Verilog/VHDL), and simulation tools.
  • Understanding of digital design concepts (state machines, pipelining, clocks, resets, etc.)
  • Debugging skills using waveforms and logs
  • Knowledge of scripting languages such as Python, Perl, or Shell
  • the ability to obtain and maintain a U.S. government issued security clearance is required.
  • U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.

Nice To Haves

  • Experience with Digital ASIC Design and Design Process
  • Experience with Testbench Generation
  • Experience with UVM (Universal Verification Methodology)
  • Experience with constrained-random verification
  • Experience building test benches and verification components

Responsibilities

  • Support the development and execution of verification plans
  • Build and maintain test benches (using UVM)
  • Debug simulation failures
  • Create and run test cases
  • Support functional coverage
  • Collaborate across teams

Benefits

  • medical
  • dental
  • vision
  • life insurance
  • short-term disability
  • long-term disability
  • 401(k) match
  • flexible spending accounts
  • flexible work schedules
  • employee assistance program
  • Employee Scholar Program
  • parental leave
  • paid time off
  • holidays
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