Digital Circuit Design Engineer

Apple•Cupertino, CA

4d•Hybrid

About The Position

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do. APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Collaborate with all fields, with a critical impact and play a strategic role of getting functional products to millions of customers quickly. Integrate and come up with new ideas, as well as work with a team of hardworking engineers. Develop custom circuits to improve chip power efficiency. Work with power team, PD and architects to define specifications and requirements. Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation/margin verification across PVT, statistical design, functional verification and silicon bring up. Work closely with layout team to complete the design and oversee the layout quality. Develop and drive circuit methodology to achieve the highest design quality metrics.

Requirements

Designing high performance circuits.
Designing ultra-low power circuits utilizing analog design.
Conducting transistor level circuit design with utilizing VLSI design.
SRAM compiler design to design SRAM macros with aggressive PPA (power performance area) targets for different applications.
Using Hspice simulation to analyze design margins across voltages and temperature.
Using Verilog to code and verify behavioral model for circuits.
Using static timing analysis and PnR (Place and Route) to work closely with physical design team for circuit integration.

Responsibilities

Develop custom circuits to improve chip power efficiency.
Work with power team, PD and architects to define specifications and requirements.
Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation/margin verification across PVT, statistical design, functional verification and silicon bring up.
Work closely with layout team to complete the design and oversee the layout quality.
Develop and drive circuit methodology to achieve the highest design quality metrics.