DFT Hardware Test Engineer/ Architect– JTAG, ICT & Functional Test
About The Position
We are looking for a DFT Hardware Test Engineer/ Architect– JTAG, ICT & Functional Test who thrives in a collaborative environment and plays a key role in ensuring our products meet the highest standards of quality and reliability. In this role, you’ll partner closely with design, manufacturing, and quality teams to shape how our boards are validated, influence decisions that improve product robustness, and help streamline how we bring complex hardware to market. You’ll contribute to an environment that values curiosity, clear communication, and continuous improvement—making a direct impact on how efficiently and confidently we deliver products to customers.
Requirements
- Deep understanding of DFT principles, boundary‑scan methodologies, and ICT development.
- Hands‑on experience with JTAG tools (e.g., XJTAG, Corelis, ASSET InterTech) and ICT platforms (e.g., Teradyne, Keysight).
- Demonstrated ability to analyze and improve test coverage and troubleshoot complex board‑level failures.
- Proficiency in scripting (Python, Perl) to automate test flows and enhance efficiency.
- Familiarity with IPC standards, PCB manufacturing practices, and failure‑analysis techniques.
- Comfortable working cross‑functionally in fast‑paced engineering environments, driving quality and testability improvements.
Responsibilities
- Collaborate with hardware design teams to integrate DFT features early and ensure board‑level testability.
- Develop and maintain Functional Test fixtures and Tests.
- Develop, debug, and optimize JTAG boundary scan test programs (e.g., XJTAG, Corelis, ASSET InterTech) for interconnect, memory, and device programming.
- Troubleshoot and root‑cause boundary scan test failures.
- Develop and maintain ICT programs on platforms such as Teradyne and Keysight, including fixture design and optimization.
- Generate ICT test programs for analog, digital, and mixed‑signal circuits, and troubleshoot ICT failures.
- Work with manufacturing teams to refine ICT processes and improve yields.
- Analyze test coverage metrics, identify improvement areas, and implement strategies to increase coverage and reduce escapes.
- Partner with design and manufacturing to resolve testability issues.
- Create and maintain test documentation including test plans, procedures, and reports; present results and track key metrics (coverage, yield, failure rates).
- Stay current on test technologies, drive process improvements, and participate in continuous improvement initiatives.
Benefits
- AMD benefits at a glance.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
