DFT Engineer - New College Grad

NVIDIA•Santa Clara, CA

About The Position

NVIDIA is seeking a highly motivated DFT Engineer to join its innovative hardware team. The Design-for-Test Engineering team focuses on creating solutions for DFT architecture, verification, and post-silicon validation for complex semiconductor chips. This role involves end-to-end DFT responsibilities, from methodology and deployment to post-silicon lifecycle support. You will collaborate with EDA tool vendors to develop new capabilities and with internal CAD teams to drive efficiency through automation. Additionally, you will work with NVIDIA VLSI and Operations teams to implement scan features across all product segments and mentor junior engineers on test designs and trade-offs.

Requirements

Pursuing a BSEE or MSEE (or equivalent experience).
Knowledge in defining scan test plans, BIST including memories and IOs, fault modeling, ATPG and fault simulation.
Excellent analytical skills in verification and validation of test patterns and logic on sophisticated and multi-million gate designs using vendor tools.
Good exposure to multiple domains including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs.
Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development.

Nice To Haves

Strong programming and scripting skills in Perl, Python or Tcl desired.

Responsibilities

Work on end-to-end DFT for sophisticated chips, from methodology to post-silicon lifecycle support.
Partner with EDA tool vendors to develop new capabilities for NVIDIA requirements.
Collaborate with internal CAD teams to drive efficiency via automations.
Work with NVIDIA VLSI and Operations teams to deliver scan features in all product segments.
Help mentor junior engineers on test designs and trade-offs, including cost and quality.