Device Engineering Intern, ULP CMOS (Summer 2026)

GlobalFoundries • Malta, NY

5d • $20 - $40 • Onsite

About The Position

GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives. The main responsibility is device engineering in the technology development organization focusing on ULP (Ultra Low Power) CMOS product line such as SMD (smart model device), Automotive, IoT (Internet of Thing), A&D (Aerospace and Defense), etc. The role includes design, execution, and analysis of experiments aimed at the creation and optimization of leading-edge silicon transistor technologies to meet the product requirements. It also includes test chip design, device characterization as well as extensive interaction with other technology development teams. In addition to the achievement of industry-leading device characteristics, cost, variability, and reliability must be monitored and controlled to ensure manufacturability and competitiveness. Interaction with end market and product line management groups is also a facet of this position to define technology requirements and parametric goals for GLOBALFOUNDRIES technology roadmaps.

Requirements

• At least a sophomore at time of application and actively pursuing a Bachelor’s in Electrical Engineering, Materials Science, Solid State Physics or related field through an accredited degree program during the time of internship.
• Must have at least an overall 3.0 GPA and be in good academic standing.
• English (Written & Verbal)
• Ability to work at least 40 hours per week during the internship.

Nice To Haves

• Prior related internship or co-op experience
• Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
• Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
• Strong written and verbal communication skills
• Strong planning & organizational skills
• Knowledge of CMOS Fabrication Process
• Understanding of solid state device physics, submicron FET architectures, and the implications of device characteristics

Responsibilities

• Device test chip layout design
• Inline and bench electric test submission and analysis
• Device analysis automation with standardization and efficiency improvement
• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern