Design Verification Engineer

Apple • Austin, TX

1d

About The Position

Imagine what you can do here. Apple is a place where extraordinary people gather
to do their lives best work. Together we create products and experiences people
once couldn’t have imagined, and now, can’t imagine living without. It’s the
diversity of those people and their ideas that inspires the innovation that runs
through everything we do.

DESCRIPTION

APPLE INC has the following available in Austin, Texas. Verify RTL designs on an
ASIC chip. Create System Verilog test benches within the UVM framework. Craft
test plans and debug tests. Craft embedded C code tests. Review design and
architecture specifications for next generation SOCs and IPs, and work closely
with design and micro-architecture teams to understand the functional &
performance goals of the design. Develop test plans, coverage plans, and define
methodology and test benches. Implement block/full chip environments and test
cases. Run regressions, perform bug tracking, analyze code and functional
coverage. Ensure deliverables align with the project goals and support
cross-functional engineering teams. 40 hours/week.

Requirements

• Bachelor’s degree or foreign equivalent in Computer Engineering or a related field.
• Utilizing Verilog and SystemVerilog to work on ASIC verification
• Utilizing UVM and OOP concepts to make code reusable
• Utilizing Python and Perl to write automation scripts and speed up constructing test benches
• Utilizing C and C++ to perform full-chip level chip verification
• Utilizing skills associated with I2C, SPI, and UART to verify peripherals
• Utilizing UNIX skills to locate and manipulate files and directories in the Terminal application
• Utilizing skills associated with computer architecture to understand hardware RTL

Nice To Haves

• N/A

Responsibilities

• Verify RTL designs on an ASIC chip.
• Create System Verilog test benches within the UVM framework.
• Craft test plans and debug tests.
• Craft embedded C code tests.
• Review design and architecture specifications for next generation SOCs and IPs, and work closely with design and micro-architecture teams to understand the functional & performance goals of the design.
• Develop test plans, coverage plans, and define methodology and test benches.
• Implement block/full chip environments and test cases.
• Run regressions, perform bug tracking, analyze code and functional coverage.
• Ensure deliverables align with the project goals and support cross-functional engineering teams.

What This Job Offers

• Job Type: Full-time
• Number of Employees: 5,001-10,000 employees