Design Verification Engineer (strong OVM)

Redolent • Austin, TX

28d • Onsite

About The Position

We have an urgent requirement for a Design Verification Engineer with strong OVM experience. This role involves developing test benches using OVM, UVM, VMM, Verilog, and SystemVerilog for full chip verification. You will utilize simulation tools like Synopsys VCS and Cadence IES to test full chip FPGA fabric and SoCs. The position requires a strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification, as well as different phases of ASIC and/or full custom chip development.

Requirements

• Strong experience with development of Strong OVM (must).
• Experience with UVM, VMM and/or Verilog, SystemVerilog test benches for full chip testbench.
• Experience with simulation tools/debug environments like Synopsys VCS, Cadence IES.
• Strong understanding of state of the art of verification techniques, including assertion and metric-driven verification.
• Strong understanding of different phases of ASIC and/or full custom chip development.

Nice To Haves

• Verification experience AXI, NoC, HBM, DDR4, PCIe verification.
• Verification experience in full chip verification.
• Experience in modeling SystemC and using SystemC based models in verification.
• Experience with FPGA programming and software.
• Verification experience in PCIe, Processors, Graphics.
• Experience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan).
• Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques.
• Some DFX/DFT and UPF/power-aware-simulation experience.

Responsibilities

• Develop test benches using OVM, UVM, VMM, Verilog, and SystemVerilog for full chip testbench.
• Utilize simulation tools and debug environments like Synopsys VCS and Cadence IES to test full chip FPGA fabric and SoCs.
• Apply state-of-the-art verification techniques, including assertion and metric-driven verification.
• Understand different phases of ASIC and/or full custom chip development.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed