Design Verification Engineer

Apple • Beaverton, OR

2d

About The Position

As part of a very dedicated team you will be at the heart of the chip design
effort collaborating with all teams (vertical product model). You own ensuring
the quality of the SOC or an IP or subsystem. This requires you to review design
and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the
functional & performance goals of the design and you use this knowledge to test
effectively. You develop test plans, tests & coverage plans as well as define
our next generation verification methodology & testbenches. You will actively
communicate and collaborate with design, architecture and software to understand
the use cases and corner conditions and drive test cases. We also require
additional responsibilities such as running and triaging regressions, tracking
bugs, and analyzing coverage to achieve top results.

Requirements

• Minimum of BS + 0 years relevant industry experience.

Nice To Haves

• Knowledge of computer architecture and digital design fundamentals Knowledge of
• Verilog or SystemVerilog, digital simulation and debug Experience with Python, Perl, or similar scripting language
• Ability to work independently to deliver the project goals Experience with C/C++, assembly is a plus.
• Excellent interpersonal skills and the dream to take on diverse challenges

Responsibilities

• review design and architecture specifications
• work closely with design & micro-architecture teams
• develop test plans, tests & coverage plans
• define our next generation verification methodology & testbenches
• communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases
• running and triaging regressions
• tracking bugs
• analyzing coverage

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level
• Number of Employees: 5,001-10,000 employees