Design Verification Engineer
Renesas Electronics•Morrisville, NC
•Onsite
About The Position
Renesas is seeking a New College Graduate (NCG) Design Verification Engineer to join the CIP organization and contribute to the verification of complex mixed-signal power management ICs. This is an excellent opportunity for a motivated recent graduate to develop foundational skills in design verification within a dynamic, collaborative engineering environment. The ideal candidate is eager to learn, detail-oriented, and has a solid academic background in electrical or computer engineering.
Requirements
- BS with up to 2 years experience or MS with no experience in Electrical Engineering, Computer Engineering, or a related field
- Coursework or project experience with digital design, verification
- Familiarity with Verilog or SystemVerilog
- Basic understanding of analog and digital circuit concepts
- Strong analytical, problem-solving, and debugging skills
- Good written and verbal communication skills; ability to work in a team environment
Nice To Haves
- Exposure to UVM (Universal Verification Methodology) through coursework, projects, or internships
- Understanding of power electronics concepts (DC-DC converters, LDOs, PMICs) is a plus
- Experience or coursework involving simulation tools such as Cadence Virtuoso
- Familiarity with scripting languages such as Python or Perl
- Familiarity with Real Number Modeling (RNM) or VerilogAms Modeling concepts
- Internship or research experience in VLSI design, verification, or a related field
Responsibilities
- Collaborate with Digital, Analog, and Verification teams on system requirements
- Participate in the development of Verification Plans and Environments
- Develop and verify self-checking testbenches using Verilog and SystemVerilog
- Write and execute directed and constrained-random tests to improve coverage
- Enhance test coverage, efficiency, and overall effectiveness of the verification process
- Debug and report design issues; drive root-cause analysis with design teams
- Learn and apply verification methodologies including UVM under senior guidance
- Support regression runs and analyze simulation results
- Document test plans, results, and findings clearly and accurately
- Grow technical skills and contribute to team and project goals
Benefits
- opportunities to explore our hardware and software capabilities
- opportunities to try new things
- flexible and inclusive work environment
- people-first culture
- global support system
- remote work option
- Employee Resource Groups
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What This Job Offers
Job Type
Full-time
Career Level
Entry Level
