New College Grad - Design Engineer, Circuit Design

Micron TechnologySan Jose, CA
$83,000 - $170,000Onsite

About The Position

The Non-Volatile Engineering (NVEG) NAND Flash design and verification team at Micron Technology develops advanced memory solutions that deliver leading die size, performance, reliability, and power efficiency. The team collaborates closely across functions to bring innovative NAND technologies from concept through production while supporting Micron’s commitment to integrity, accountability, and global community impact. The Design/Verification Engineer contributes to the architecture, design, simulation, and verification of NAND Flash circuits and systems. This role spans analog and digital domains and works multi-functionally to ensure robust, manufacturable, and high‑performance memory products that meet cost, quality, and schedule requirements.

Requirements

  • Knowledge of analog design theory, loop stability analysis, device physics, and CMOS device reliability.
  • Understanding of memory cell read/write operations, array architecture, and unit‑block verification methodologies.
  • Experience in transistor‑level analog and digital IC design using CMOS, including simulation and post‑layout analysis.
  • Experience designing several analog/digital blocks such as bandgap references, regulators, charge pumps, ADC/DACs, oscillators, comparators, sensors, or custom logic.
  • Working knowledge of digital design flow (Verilog, RTL synthesis, logic simulation, place and route), scripting languages (Perl, Python, or C++), and Verilog‑A basics, with strong written and verbal communication skills.

Nice To Haves

  • Exposure to AI/ML or data‑driven automation techniques, such as Python scripting or AI‑assisted development tools, to improve design or verification efficiency.
  • Proficient knowledge of memory cell test flow and hands‑on lab experience with IC characterization and debugging.
  • Familiarity with circuit‑level reliability fundamentals, including aging effects and device stress mechanisms.
  • Advanced expertise with analog and digital simulators such as HSPICE, Verilog, XA, or Finesim.
  • Experience with Cadence design environments and LVS/DRC tools, along with deeper expertise in scripting or digital implementation flows.

Responsibilities

  • Participate in multi‑functional evaluations of key features and recommend architectural decisions for NAND Flash designs.
  • Break down system functions into analog and/or digital circuits and design, simulate, optimize, and floor plan NAND circuitry.
  • Analyze design feasibility and circuit functionality, including performance, power, and reliability.
  • Validate designs through block‑ and chip‑level simulations using industry‑standard simulators and defined verification coverage.
  • Collaborate with multi-functional teams to evaluate NAND die performance, power consumption, manufacturability, and root‑cause analysis.

Benefits

  • Choice of medical, dental and vision plans
  • Benefit programs that help protect your income if you are unable to work due to illness or injury
  • Paid family leave
  • Robust paid time-off program
  • Paid holidays
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