The Design Architect Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications. The Design Architect Analog IC Designer contributes to the design of long-reach SerDes. The candidate’s background should include a minimum of 10 years of experience in the development of CMOS SerDes or high-speed I/O IC. Must have a thorough understanding of jitter and signal equalization techniques. Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators. Excellent problem-solving skills, good communication skills, and ability to work cooperatively in a team environment. Working knowledge of a set of common SerDes standards and their electrical requirements is a plus. Position requires proficiency in using CAD tools for circuit simulation, and post-layout verification. Proficiency with layout entry a plus. Cadence tool experience, lab test experience, and design experience at ≥16Gbps and in ≤16nm technologies. MS or PhD in EE.
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Job Type
Full-time
Career Level
Senior