Data Center Power & Limits Architect

Qualcomm • San Diego, CA

4d • $164,000 - $246,000

About The Position

The Data Center Power & Limits Architect will define and drive next-generation power management, thermal, and system limits architecture for large-scale compute platforms (SOC, servers, racks, and cluster-level deployments). With AI/HPC workloads pushing infrastructure to electrical and thermal limits, this role is responsible for enabling maximum sustained performance within constrained power, cooling, and reliability envelopes by architecting end-to-end power and limits systems across silicon, platform, and data center infrastructure.

Requirements

• 10+ years of experience in power architecture, system architecture, or related domains
• Deep expertise in power management systems and limits control
• Deep expertise in thermal and electrical constraints in high-performance systems
• Deep expertise in DVFS/DCVS, power capping, and control systems
• Strong understanding of data center/server architecture (CPU/GPU/accelerators, memory systems)
• Strong understanding of power delivery networks (VRs, PDN, rack power distribution)
• Strong understanding of telemetry, sensors, and system monitoring
• Experience with modeling and analysis tools (e.g., MATLAB, Python)
• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Responsibilities

• Define holistic power, thermal, and electrical limits architecture across silicon, board, system, rack, and cluster levels
• Architect power budgeting, allocation, and enforcement mechanisms across CPU, GPU, memory, accelerators, and I/O
• Develop strategies to maximize performance under datacenter-level constraints (rack power caps, cooling limits, PUE targets)
• Architect advanced dynamic power control systems (e.g., DVFS/DCVS, AVS-like systems) for fast transient response
• Design closed-loop control systems using telemetry and feedback to optimize performance vs. constraints
• Develop proactive and reactive limit management (thermal throttling, power capping, workload shaping)
• Define requirements and interfaces for telemetry infrastructure (sensors, BMC, firmware, system SW)
• Enable real-time monitoring and decision making across system layers
• Ensure integration with platform controllers (e.g., BMC/EC, rack management, orchestration layers)
• Define hardware/software partitioning for limits enforcement with minimal overhead
• Develop system-level models (MATLAB/Simulink, architectural simulators) to predict performance vs. power/thermal constraints, evaluate algorithms and architecture trade-offs, and perform workload-driven analysis to validate architecture decisions
• Drive innovations in power delivery efficiency, thermal-aware scheduling, AI workload-aware limits, and rack/cluster-level power orchestration
• Define next-generation architectures to support scaling AI/HPC performance under constrained infrastructure

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play

What This Job Offers

• Job Type: Full-time
• Career Level: Senior