CUDA Engineer

Fuse Energy

About The Position

Fuse Energy is a forward-thinking renewable energy startup on a mission to deliver a terawatt of renewable energy - fast. We're combining first-principles thinking with cutting-edge technology to build a radically better energy system. We raised $210M from top-tier investors including Multicoin, Balderton, Lakestar, Accel, Creandum, Lowercarbon, Ribbit, Box Group and strategic angels like Nico Rosberg, the Co-Founder of Solana and GPs behind Meta, Revolut, Spotify, Uber and more. As data centers become one of the largest and fastest-growing sources of electricity demand, Fuse is expanding into high-performance compute infrastructure that sits at the intersection of energy and AI - optimising how power-dense GPU workloads are scheduled, cooled, and balanced against grid conditions in real time. We're looking for a CUDA Engineer to write and optimise the low-level GPU code that powers our inference workloads. You'll design custom CUDA kernels, tune performance across memory bandwidth and compute bottlenecks, and squeeze maximum throughput out of every GPU in our fleet, working at the level of SMs, warps, and memory hierarchies. The Opportunity Demand for high-performance compute capacity across the markets we operate in significantly outpaces what we can currently build, meaning speed to power and reliability are critical to how we scale. This puts CUDA/GPU performance engineering at the center of how Fuse scales its compute infrastructure.

Requirements

4+ years writing production CUDA code, with a track record of shipping performance-critical kernels.
Deep understanding of GPU microarchitecture, warps, occupancy, register pressure, and memory hierarchy.
Strong CUDA C++ skills, including streams and asynchronous execution.
Hands-on experience profiling to diagnose compute-bound vs. memory-bound bottlenecks.
Experience with kernel fusion, memory coalescing, and avoiding warp divergence.
Experience writing quantised and mixed-precision kernels.
Solid grasp of parallel algorithm design and numerical precision tradeoffs.

Nice To Haves

Experience with transformer/attention-style kernels or autoregressive decoding.
Experience building high-performance GPU libraries from scratch.
Background in HPC or other latency-critical performance engineering.
Exposure to multi-GPU or multi-node kernel-level optimisation.
Comfortable reading PTX/SASS to validate kernel efficiency.

Responsibilities

Write and optimise custom CUDA kernels for core transformer inference operations.
Profile kernels to identify and eliminate bottlenecks in occupancy, memory throughput, and warp divergence.
Apply kernel fusion to reduce memory round-trips and launch overhead across inference pipelines.
Optimise memory access patterns and manage the memory hierarchy for maximum bandwidth utilisation.
Implement quantisation-aware kernels and mixed-precision arithmetic to reduce latency and memory footprint.
Build and tune caching mechanisms for efficient autoregressive decoding.
Tune kernel launch configurations for target GPU architectures.
Benchmark kernels against existing baselines and drive measurable throughput and latency improvements.
Write tests for CUDA code to catch performance and correctness regressions.
Maintain internal CUDA libraries and contribute to team coding standards and documentation.