CPU Power and Thermal Management Architect

Qualcomm•San Diego, CA

2d•$198,700 - $298,100

About The Position

We are dedicated to transforming industry by reimagining silicon and developing next-generation computing platforms. By joining our team, you’ll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing server-class high performance solutions that are highly optimized for the needs of the server product. We are hiring talented engineers for CPU Power management Architecture focusing on various aspects of Power and thermal management including Boot architecture for the system, Idle power management, Active Power management, clock management and Limit management aspects for high performance, low power devices. In this role, you will work with architects and SW teams to conceive of the architecture and micro-architecture and help with product definition through early involvement in the product life cycle. The ideal candidate will have extensive knowledge of CPU and SoC architecture across various product segment – Datacenter Server, Mobile, Compute and Auto SoCs, including experience in microarchitecture and design of coherent CPU systems. CPU Power and thermal management architecture involves micro-architecture and deployment of various power management techniques and deploying various solutions working alongside Software, Firmware and SoC power management architects. Strong analytical, problem-solving, and communication skills are essential for excelling in this position.

Requirements

MS degree in Computer or Electrical Engineering with 15+ years of CPU and SoC architecture or similar experience.
Deep knowledge of microprocessor architecture, with expertise in one or more of the following areas: Boot Architecture: Understanding of system boot and various pieces in SW, FW and HW to optimize various boot KPIs
Idle Power management: Understanding of various clock and power gating techniques and flows, involvement of SW and FW alongside, understanding of APCI and PSCI Idle power states for the system
Active Power management: Experience on Dynamic voltage and Frequency scaling architecture, alongside understanding of various voltage margins and reliability concepts including both HW and SW algorithms and understanding of various analog mixed signals IPs to reduce the Vmin.
Limit and Thermal management: Understanding of over-current, power and thermal limits of the system and implementation of various SW and HW control loops.
Excellent technical documentation skills, along with strong written and verbal communication abilities
Understanding of various Software and Firmware control loops and building system level solutions.
Solid understanding of logic design principles, including timing and power implications

Nice To Haves

MS degree in Computer or Electrical Engineering.
Understanding of CPU, cluster architecture and SoC architecture.
Understanding of high-performance and low power micro-architecture techniques and trade-offs in CPU microarchitecture.

Responsibilities

Work with chip architects to understand architecture concepts and high-level system requirements
Take on a leadership role in developing the micro-architecture and design of high-performance CPU system
Prepare and present clear and comprehensive technical documentation to meet the needs of stakeholders, including engineering teams, senior management and internal partners.
Develop High-Level Architecture and Micro-Architecture specifications that can translate to RTL design.
Collaborate with HW, SW and FW architects to develop an optimal end-to-end CPU System architecture
Performance exploration. Explore high performance strategies working with the CPU modeling team.
Collaborate with Software, Firmware, and platform teams to integrate CPU system features into products.