CPU Core Physical Design Engineer

Intel Corporation•Folsom, CA

21h•$105,650 - $172,860•Hybrid

About The Position

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. We're looking for motivated and talented engineers to join the US CPU design team. In this role, you will be critical to the development of next-generation CPUs designed to power the AI revolution. The CPU Physical Design Engineer performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams. Possesses CPU-specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT. Works intimately with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low-power synthesizable CPU. Optimizes CPU design to improve product-level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. Highly qualified candidates will possess strong problem-solving skills and tolerance for ambiguity. You will join the Data Center Group (DCG), a global leader in developing cutting-edge technologies that power the infrastructure of the digital economy. This team is at the forefront of enabling advancements in cloud computing, artificial intelligence, and data analytics, delivering world-class solutions that support Intel's broader mission of creating world-changing technology. DCG fosters collaboration across diverse disciplines to design and optimize CPUs that meet the demands of today's data-driven world.

Requirements

Bachelor's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree and 1+ years of experience OR master's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree.
3+ months of experience in VLSI circuit design and synthesis.
3+ months of experience in Static timing analysis
3+ months of experience in Low power design

Nice To Haves

x86 CPU architecture.
Tcl/Perl/Python programming.

Responsibilities

Implement physical design flows for custom CPU designs, transitioning from RTL code to GDS format.
Conduct synthesis, place and route, clock tree synthesis, and floor planning processes.
Perform static timing analysis, reliability verification, and power distribution optimization.
Execute verification and signoff processes, including formal equivalence, electrical rule checking, and layout validation.
Partner with cross-functional teams, including logic, circuit, architecture, and design automation experts, to optimize CPU microarchitectures.
Collaborate with EDA vendors to enhance tool capabilities that support the design of high-speed, low-power CPUs.
Develop and refine methodologies and automation flows to improve design processes and efficiency.