CPU Core Senior Physical Design Engineer

Intel Corporation•Folsom, CA

3d•$164,470 - $232,190•Hybrid

About The Position

Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams. Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT. Works intimately with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low power synthesizable CPU. Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Requirements

Bachelor's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree and 6+ years of experience OR master's degree in computer engineering, Computer Science or Electrical/Electronic Engineering or any STEM related degree and 4+ yrs. of experience in: VLSI circuit design and synthesis.
Static timing analysis.
Low power design.

Nice To Haves

2+ years of experience in: x86 CPU architecture.
Tcl/Perl/Python programming.

Responsibilities

Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
Works intimately with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low power synthesizable CPU.
Optimizes CPU design to improve product level parameters such as power, frequency, and area.
Participates in the development and improvement of physical design methodologies and flow automation.