CPU Core Design Verification Test Generator Lead

Tenstorrent•Austin, TX

2d•$100,000 - $500,000•Hybrid

About The Position

Tenstorrent is a leader in cutting-edge AI technology, aiming to revolutionize performance, ease of use, and cost efficiency. As AI redefines the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team has developed a high-performance RISC-V CPU from scratch, driven by a passion for AI and a desire to build the best AI platform. We value collaboration, curiosity, and solving hard problems. We are expanding our team and seeking contributors of all seniorities. In this role, you will own the development of CPU core-level test generators and the CPU core verification strategy, influencing how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This is a hybrid role based in Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels, and the final level and offer will be determined during the interview process.

Requirements

8+ years in CPU design verification, test generation, or closely related CPU validation work.
Led development of test generators for x86, ARM, or RISC-V ISA environments.
Understanding of CPU ISA behavior, privileged architecture, and high-performance out-of-order CPU microarchitecture.
Comfortable building tools, stimulus, and automation that scale verification across large CPU programs.
Ability to communicate clearly across design, DV, architecture, emulation, and post-silicon teams.

Responsibilities

Lead development of CPU core-level test generators for high-performance out-of-order RISC-V cores.
Own generator strategy, infrastructure, and methodology for ISA and microarchitectural verification.
Develop directed and randomized stimulus that targets architectural corner cases, instruction interactions, and complex CPU behavior.
Support RISC-V certification work, including test content, compliance flows, debug, and closure.
Guide a small team of 4-5 engineers while staying hands-on with implementation, debug, and verification execution.