Core Performance Architect

SiFive•Austin, TX

1d•$178,848 - $218,592•Remote

About The Position

SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. The successful candidate will work with the architecture and design team to research and develop next generation high performance processors.

Requirements

MS in Computer Science / Computer Architecture
3+ years of experience in high performance processor development
3+ years involved in the engineering team to deliver HW or SW products.
Hands-on expertise with either HW development (RTL/implementation flows, verification/validation, backend flows, FPGA flows); FPGA debug, including the use of Integrated Logic Analyzer for waveform capture and debug
Knowledge in analyzing performance bottlenecks in micro-architecture and software stack.
Good foundation in computer architecture of high performance out-of-order CPU designs.
Good foundation in workload characterization to identify HW/SW performance bottlenecks
Good foundation in workload reduction techniques for efficient performance simulation and projection

Nice To Haves

Awareness of potential security holes is a plus.
Awareness of known industry micro-architectures is a plus.

Responsibilities

Work along with a team of performance engineers to research, model and develop architecture / micro-architecture ideas to build state-of-the-art performance processors that reach our aggressive performance targets.
Design and carry out experiments to research and develop architecture / micro-architecture features.
Work with the design team to implement and deliver performance target in RTL.