Compiler Backend Engineer

Normal Computing Corporation • Palo Alto, CA

3d • $200,000 - $300,000

About The Position

Normal Computing is hiring a Compiler Backend Engineer to design and build custom compilation software that maps large-language-model inference onto its in-memory hardware. The hardware is designed to run memory-bound inference inside memory rather than moving weights to a processor, and requires a compiler backend built specifically for its architecture. The role spans scheduling and memory planning through generation of executable hardware code. The engineer will work closely with hardware teams to shape compiler and hardware abstractions, using simulators and FPGA prototypes before validating work on silicon as it becomes available.

Requirements

• Deep experience with compiler optimization or code generation for accelerators or other non-CPU targets, including areas such as scheduling, tiling, fusion, or resource allocation.
• Comfort working close to hardware, considering memory bandwidth and utilization as well as asymptotic complexity.
• Willingness to design compilation approaches from first principles when existing approaches do not suit the hardware.
• A track record of shipping optimizations that improve a measured performance metric.
• Comfort building software for evolving hardware, from simulation through bring-up.
• Fluency in Python.
• Familiarity with C, C++, or Rust.

Nice To Haves

• Experience with PyTorch's compilation stack (TorchDynamo, FX, Inductor, or torch.export) or ML compilers such as IREE, TVM, or XLA.
• Experience compiling for in-memory, spatial, or other non-von-Neumann compute targets.
• Background in hardware design tools such as logic synthesis or place-and-route.
• Experience building or using cycle-level or performance simulators to guide optimization decisions.
• Contributions to open-source compiler or kernel infrastructure such as PyTorch, Triton, TVM, MLIR, or LLVM.
• Publishing or presenting compiler or performance work at venues such as MLSys, ASPLOS, or CGO.

Responsibilities

• Build code-generation passes that turn lowered programs into executable code for the hardware, developing new compilation approaches where conventional techniques do not fit.
• Own scheduling and memory planning across hardware resources, optimizing utilization and end-to-end LLM inference latency.
• Own fusion and dispatch decisions for LLM inference to reduce unnecessary data movement and keep hardware computing.
• Collaborate with hardware architects on the compiler–hardware abstraction layer and communicate compiler constraints while hardware designs can still change.
• Validate optimizations using measured results from simulators, FPGA prototypes, and eventually silicon.
• Maintain a trusted performance regression suite.
• Take lowered programs from frontend compiler engineers and work with the team to decide which operations are compiler-generated and which use hand-tuned kernels.

What This Job Offers

• Job Type: Full-time
• Education Level: No Education Listed