Clocking Systems Engineer, Staff

Qualcomm•Toronto, ON
•CA$110,500 - CA$160,500

About The Position

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enable the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams to meet and exceed system-level requirements and standards. This is a replacement position.

Requirements

  • 4+ years of relevant industry experience, or equivalent advanced academic experience, in clocking systems, mixed-signal design, SerDes, or related areas.
  • Strong understanding of: Digital / mixed signal PLLs and clocking architectures, Clock and Data Recovery (CDR) Architectures, Jitter and phase noise analysis, Clocking related adaptations and calibrations.
  • Experience developing behavioral or system-level models using MATLAB, Python, and SystemVerilog.
  • Excellent communication and collaboration skills.
  • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
  • OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
  • OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Nice To Haves

  • Master's or Ph.D. in Electrical Engineering or related field.
  • Experience with DSP-based 112G, 224G, or higher-speed SerDes architectures.
  • Knowledge of analog and mixed-signal PLL building blocks, including phase detectors, phase interpolators, and digitally controlled oscillators (DCOs).
  • Experience with digital design and RTL development, including bit-accurate modeling and efficient hardware implementation techniques.
  • Experience with silicon validation and model-to-silicon correlation.

Responsibilities

  • Develop industry-leading DSP and mixed-signal SerDes architectures and solutions, with specialization in clock generation, clock recovery, and timing synchronization.
  • Develop and maintain behavioral and system-level models for PLLs, CDRs, Retimers, clock distribution networks, and related timing circuits.
  • Analyze system performance and architectural tradeoffs, identify design margins, and develop regression test frameworks to validate performance across multiple projects.
  • Support silicon bring-up and model-to-silicon correlation, including investigation of clocking-related performance issues.
  • Improve simulation efficiency and engineering productivity through model optimization, code enhancements, and automation of verification and regression workflows.
  • Collaborate with analog, digital, firmware, and validation teams to ensure successful implementation and integration of clocking solutions.
  • Document technical analyses, architecture decisions, and validation results.

Benefits

  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Highly competitive benefits package designed to support your success at work, at home, and at play.
Ā© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service