About The Position

Neurophos is developing a novel computing architecture using silicon photonics and an active, programmable metasurface for matrix multiplications at the speed of light. This approach aims to overcome the power limitations of traditional electronic circuits for AI inference, offering significantly higher energy efficiency and performance. The company has secured $110M in Series A funding and is seeking a Chief Engineer to lead the technical execution of their first fully integrated prototype system. This role is hands-on and requires deep multi-disciplinary hardware intuition, systems engineering discipline, technical credibility, and experimental rigor. The engineer will own the end-to-end system performance, maintain architecture and interface definitions, scrutinize designs, and drive integration and bring-up. Beyond the initial demonstration, the engineer will steward the prototype as a permanent experimental platform for optical computing, quantifying impairments, prototyping mathematical encodings, and feeding learnings into future product generations.

Requirements

  • BS required; MS or PhD strongly preferred, in Electrical Engineering, Optical Engineering, Applied Physics, or a closely related field.
  • 15+ years of professional experience developing complex multi-disciplinary hardware systems.
  • At least 3 years as the responsible system-level engineer or technical lead.
  • Demonstrated ownership of at least one system carried from architecture definition through design, integration, laboratory bring-up, and subsequent experimental characterization.
  • Proven ability to construct and maintain requirements sets, interface control documents, verification matrices, and quantitative performance budgets.
  • Demonstrated ability to design experiments that isolate a single physical mechanism within a system where multiple effects occur simultaneously.
  • Comfort with measurement uncertainty, repeatability, confounding variables, and the discipline required to produce results that survive scrutiny.
  • Familiarity with statistical design of experiments and sensitivity analysis.
  • Strong working knowledge of analog and high-speed electronics—data-converter interfacing, transmission lines and termination, coupling and biasing, amplifier and detector front-ends, noise and distortion mechanisms, power integrity, and grounding.
  • Must be able to independently review schematics and component selections and identify design errors.
  • Deep understanding of the impairment mechanisms that limit real optical and mixed-signal systems—thermal, shot, and flicker noise; component mismatch; compression and harmonic distortion; bandwidth and group-delay limitations; crosstalk; quantization; jitter and drift—and the ability to predict their system-level consequences from first principles before measuring them.
  • Solid understanding of optical system fundamentals—sources, fiber and free-space propagation, electro-optic modulation, photodetection, optical power budgets, and the coupling and alignment tolerances that govern real optical assemblies.
  • Working fluency in linear algebra, signal processing, and modulation and encoding theory, sufficient to reason independently about alternative mathematical encodings of the compute operation and about what each one implies for hardware precision, dynamic range, and noise tolerance.
  • Experience acting as the technical authority over external design houses, contract manufacturers, or component vendors, including specification writing, design review, deliverable acceptance, and technical negotiation.
  • Sufficient understanding of embedded firmware, FPGA-based control, and host-side software architecture to specify, review, and challenge the software interfaces to the hardware.
  • Strong proficiency in Python and/or MATLAB for performance budgeting, test automation, measurement data analysis, and system-level modeling.
  • Excellent technical communication and documentation skills, and the credibility and temperament to make and defend architectural decisions across disciplines, with internal teams and external partners alike.

Nice To Haves

  • Experience owning a laboratory testbed or experimental platform for multiple years, used by several teams to address successive research and architectural questions.
  • Experience with high-channel-count systems in which many parallel electrical and optical channels must be matched, aligned, and calibrated.
  • Familiarity with FPGA- or RFSoC-class platforms that integrate high-speed data converters and the board-level design practices associated with them.
  • Experience with fiber-optic assemblies, connectorization and polish standards, optical alignment, and opto-mechanical tolerancing.
  • Background in optical transceivers, coherent or direct-detection links, silicon photonics, or photonic computing platforms.
  • Experience with modulation formats, coding, and precision–noise trade-offs in analog or optical computing, analog signal processing, or high-order signaling links.
  • Familiarity with calibration architectures and their hardware and software implications at the system level.
  • Experience with Monte Carlo analysis, error budgeting, and correlating behavioral system models with measured hardware.
  • Experience running a formal gate review process (PDR/CDR-style) across internal teams and external suppliers.
  • Familiarity with Cadence Virtuoso, Spectre, or comparable circuit simulation environments for independent verification of vendor analyses.
  • Laboratory proficiency with high-scope, network and spectrum analyzers, optical power meters, optical spectrum analyzers, and precision alignment equipment, including automated instrument control.
  • Experience with configuration-controlled engineering documentation and issue tracking in a version-controlled environment.

Responsibilities

  • Own, maintain, and defend the end-to-end system performance budget, flowing top-level requirements down to subsystem allocations.
  • Define and maintain the system architecture, requirements set, and interface definitions for all subsystems and suppliers.
  • Serve as the technical counterpart to external design houses and component vendors, reviewing designs and analyses.
  • Critically evaluate mixed-signal, high-speed electronic, optical, and opto-mechanical designs for correctness and manufacturability.
  • Ensure firmware and host software meet hardware requirements and system-level use cases.
  • Plan and lead the integration sequence, define acceptance criteria, and drive laboratory bring-up and debug of the assembled system.
  • Design and execute controlled experiments to isolate and quantify the effect of individual optical and electrical impairments on computational accuracy.
  • Support and enable experimentation with alternative mathematical encodings and signaling schemes.
  • Own the prototype as a permanent, trustworthy measurement instrument, keeping it instrumented, reconfigurable, calibrated, and documented.
  • Maintain the system requirements, verification and test matrices, and configuration-controlled documentation.
  • Own the technical risk register and open-item list.
  • Interface with various engineering teams to ensure subsystem design intent is represented at the system level and translate measured results into design guidance.
  • Partner with system modeling and calibration teams to close the loop between prediction and measurement.
  • Build and maintain automated measurement, data capture, and analysis infrastructure.
  • Contribute to build planning, long-lead procurement decisions, test equipment definition, and schedule risk assessment.
  • Mentor engineers and raise the systems-engineering and experimental rigor of the organization.

Benefits

  • 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
  • Unlimited PTO.
  • 401(k) matching.
  • Stock option opportunities.
  • Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
  • Personalized Benefits: Choose the plans that fit your life and take the cash back for those that don’t.
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