Camera Power Engineer
About The Position
The Multimedia Power team at Qualcomm is seeking a highly skilled and experienced Staff Low Power Hardware Architect to join our dynamic group. This team is at the forefront of developing and optimizing cutting-edge technologies in Camera, Video Encoding/Decoding, and Computer Vision, which serve as the foundation for billions of Snapdragon-powered devices. Our diverse product portfolio spans Mobile, Automotive, Compute, Extended Reality (XR), and Internet of Things (IoT) applications. As a member of the Multimedia Power team, you will play a pivotal role in the analysis, budgeting, and optimization of power consumption across all multimedia use cases. Your expertise will directly impact the efficiency and performance of devices used by millions worldwide, helping to deliver industry-leading power solutions.
Requirements
- Bachelor’s degree in Electrical Engineering (BSEE) or a Master’s degree in Electrical Engineering (MSEE)
- Extensive experience with low power design techniques, including setting power targets for hardware cores, pre-silicon power estimation, and post-silicon power measurement and validation.
- Deep understanding of state-of-the-art power estimation and optimization tools such as Synopsys PrimePower, Ansys Power Artist, and Siemens PowerPro.
- Solid grasp of synthesis and physical design processes, particularly as they relate to power optimization and management.
- Knowledge of multimedia intellectual properties (IPs), including camera systems, video codecs, and computer vision technologies.
- Familiarity with SoC architectures and system-level design principles.
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field.
Nice To Haves
- Experience with hardware design and verification tools is highly desirable.
Responsibilities
- Defining Power Targets: Establish hardware core-level power targets, drive power optimization strategies, and ensure that these targets are consistently met throughout the entire System-on-Chip (SoC) execution process.
- Power Analysis & Estimation: Utilize industry-standard power estimation and optimization tools—including Synopsys PrimePower, Ansys Power Artist, and Siemens PowerPro—to analyze and estimate power consumption at various stages of the design cycle.
- Silicon Validation: Validate power estimates by correlating them with actual silicon measurements on target platforms, ensuring accuracy and reliability of power models.
- Advanced Modeling: Leverage deep learning and machine learning techniques to analyze, model, and predict power consumption for next-generation multimedia platforms, driving innovation in power efficiency.
- Design Cycle Support: Provide ongoing support for multimedia core power optimization and estimation of both average and peak power throughout the design cycle, from pre-RTL stage to post-silicon validation.
- Cross-Functional Collaboration: Work closely with System Architects, Design Engineers, and Verification teams to define, update, and refine multimedia use cases for comprehensive core power analysis. Thrive in a fast-paced, collaborative setting that requires daily interaction with cross-functional teams. Strong communication, planning, and execution skills are essential for success in this role.
Benefits
- competitive annual discretionary bonus program
- opportunity for annual RSU grants
- highly competitive benefits package
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What This Job Offers
Job Type
Full-time
Career Level
Senior
