Associate Design Engineer

Credo•San Jose, CA

1d•$100,000 - $150,000

About The Position

Team Credo is looking for an Associate Design Engineer to join our mission to transform the connectivity at scale. This role will be responsible for front-end ASIC design, including RTL implementation and verification of complex logic blocks. This position will collaborate with PD, to ensure successful tape-outs and work closely with system teams for chip bring-up and validation. Credo’s mission is to transform connectivity at scale through fast, reliable, and energy-efficient system solutions. Our high-speed copper and optical interconnect products deliver industry-leading power and performance at up to 1.6T to meet the ever-expanding data infrastructure demands of AI. Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Credo innovations enable our customers to connect the systems that connect the world. Credo is committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, gender identity, sexual orientation, pregnancy, marital status, national origin, ethnicity, genetic information, age, disability, veteran status, or any other legally protected basis. If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email [email protected].

Requirements

Detail-oriented with a passion for quality and innovation.
Hands-on experience with testing lenses, fibers using standard set ups or custom-build systems.
Proficiency in scientific programming using Python, with at least 5 years of experience.
Must be able to independently run testing equipment.
Excellent communication and teamwork skills.

Nice To Haves

Proficiency in scientific programming using Python, with at least 5 years of experience.
Exposure to statistical tools for data analysis (JMP, Minitab, etc.) and test correlation.
Ability to work with contract manufacturers and test partners to support smooth deployment.

Responsibilities

Front-end ASIC design, including RTL implementation and verification of complex logic blocks.
Collaborate with PD to ensure successful tape-outs.
Work closely with system teams for chip bring-up and validation.
Own the execution of automated and manual optical tests for lenses, fiber optics, and active components (lasers, LEDs, photodiodes).
Ensure precision and reliability by maintaining detailed, reproducible test documentation, calibration routines, and data logs.
Select and integrate advanced equipment from third-party vendors for scalability and performance.
Store, analyze and optimize test data to improve yield, coverage, and repeatability.
Collaborate cross-functionally with optical designers and manufacturing partners to ensure smooth deployment and continuous improvement.