ASIC Verification Engineer

Axiado • San Jose, CA

3d • Onsite

About The Position

Verification Engineer position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT. You will be responsible for RTL SoC/Subsystem verification of ARM based SoCs, and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows. You will report to the Director of Engineering (Verification).

Requirements

• 8+ years of experience in UVM verification and UVM environment development (must have)
• Proficient in test plan definition and testcase development in C/Assembly/System Verilog
• Expertise in verifying design at RTL level and gate-level simulation
• Good understanding of coverage analysis, performance verification and use-case verification.
• Must have worked on AMBA AXI, AHB, APB protocols
• Should have worked on verifying interface protocols like PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART, etc.
• Experience in functional test vector development and post-silicon bring-up/debug.
• Fluency with scripting languages (e.g., Perl, Python, Shell)
• Experience in working with repository management tools like Bitbucket/ Jenkins and bug tracking tools like JIRA.
• BE/BTECH or ME/MTECH degree in EE/EECS/CS or equivalent.

Responsibilities

• Help develop test plan definition
• Micro-architecture design verification, RTL verification, and documentation
• Top-level and block-level functional and performance verification, and system level use-case verification
• Support test program development, chip validation, and chip life until production maturity
• Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Associate degree