ASIC Subsystem Engineer (Mid-level or Lead)
About The Position
The Boeing Space & Missions Systems Division is seeking a Mid-level or Lead ASIC Subsystem Engineer to join the Space and Launch Engineering team in El Segundo, California. The role supports the design and development of advanced ASICs and mixed-signal components for space-based digital communication systems supporting commercial, civil, and national security programs. The work is primarily focused on subsystem-level architecture, requirements, verification, integration, and technical coordination for ASICs, digital signal-processing functions, and mixed-signal ADC/DAC converters. The engineer will collaborate with domestic and international customers, suppliers, program management, integration and test engineers, and senior technologists. Assignments may cover the full unit life cycle, including architecture development, internal trade studies, concept studies, system definition, design development, verification, integration, qualification, and unit sell-off. The position is 100% onsite at Boeing’s El Segundo, California location. The worksite participates in an optional 9/80 schedule rotation, allowing employees to work nine-hour shifts on eight days per biweekly pay period and receive every other Friday off. The position requires the ability to obtain a U.S. Security Clearance; a final U.S. Secret Clearance post-start is required. The role also requires compliance with U.S. export control requirements. Boeing will not sponsor applicants for employment visa status. Relocation is available based on candidate eligibility.
Requirements
- Bachelor of Science degree in engineering, engineering technology, chemistry, physics, mathematics, data science, or computer science.
- Five or more years of related work experience or an equivalent combination of technical education and experience.
- Experience with a higher-level programming language such as C, MATLAB, Python, or similar.
- At least one year of experience working with analog, mixed-signal, or digital circuits.
- At least one year of experience developing digital architecture requirements, interfaces, verification plans, or related system requirements.
- At least one year of experience with ASIC development processes and working with ASIC manufacturers or ASIC design houses and IP suppliers.
- Ability to obtain a U.S. Security Clearance; U.S. citizenship is required for the clearance, and a final U.S. Secret Clearance post-start is required.
- Meet U.S. export control compliance requirements as a U.S. Person.
- For the Lead (Level 4) level, nine or more years of related work experience or an equivalent combination of technical education and experience.
Nice To Haves
- Master’s degree or higher in Electrical Engineering, Computer Engineering, or a related technical discipline; where applicable, a master’s degree may count as two years of experience.
- Three or more years of experience in VLSI, digital architecture, or verification planning for digital-communications ASICs.
- Three or more years of subsystem or systems engineering experience involving digital communication or radar payloads.
- Nine or more years of cumulative engineering experience related to the responsibilities described.
- Experience developing architecture, requirements, and verification plans for ASICs, ADCs, DACs, or related mixed-signal components.
- Experience with built-in test or built-in self-test functions for ASIC verification.
- Experience with high-speed interfaces such as JESD or other SerDes multi-lane interfacing standards, general control interfaces such as SPI, I2C, or JTAG derivatives, and SerDes IP procurement.
- Experience procuring and evaluating SerDes and ADC/DAC IP.
- Experience tracing requirements from system specifications or architecture descriptions to ASIC-level requirements.
- Experience documenting requirement allocation rationale and validation evidence.
- Experience supporting ASIC design reviews, supplier reviews, hardware integration, qualification, and unit sell-off.
- Demonstrated ability to lead technical activities and collaborate effectively in multidisciplinary, team-oriented environments.
Responsibilities
- Define, develop, and validate next-generation multi-ASIC architectures incorporating digital signal-processing cores for digital communication subsystems.
- Architect, derive, allocate, and verify requirements for ASIC functions, interfaces, and subsystem performance.
- Develop general verification strategies and requirements traceability for ASIC and mixed-signal functions.
- Lead technical trade studies involving performance, cost, schedule, risk, complexity, and manufacturability.
- Serve as a subsystem engineering point of contact for ASIC design houses, IP suppliers, semiconductor manufacturers, and internal engineering organizations.
- Coordinate technical activities, analyses, reviews, and deliverables within the ASIC integrated product team.
- Derive and validate ADC/DAC performance requirements, including ENOB, SNR, SINAD, SFDR, THD, aperture and clock jitter, linearity, gain and offset errors, spurs, calibration, and synchronization, considering performance across process, voltage, and temperature operating conditions.
- Develop and manage design validation test plans for mixed-signal ADC/DAC converters.
- Define and manage screening requirements and screening plans for mixed-signal components.
- Support subsystem-level modeling, analysis, integration, and performance simulations for ADC/DAC converters and related ASIC functions.
- Support ASIC-level and subsystem-level hardware and software integration.
- Support hardware procurement, supplier technical reviews, design reviews, qualification activities, and unit sell-offs.
- Prepare technical presentations, review materials, requirements documentation, interface documentation, verification evidence, and technical reports.
- Identify technical risks and develop mitigation plans in coordination with program and engineering leadership.
Benefits
- Eligible employees may enroll in health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and programs providing paid and unpaid time away from work.
- Competitive base pay and variable compensation opportunities.
- Relocation based on candidate eligibility.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
